JAJSF25C March 2018 – January 2023 DS90UB936-Q1
PRODUCTION DATA
BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
---|---|---|---|---|
7:4 | SDA_OUTPUT_SETUP | R/W | 0x1 | Remote Ack SDA Output Setup When a Control Channel (remote) access is active, this field configures setup time from the SDA output relative to the rising edge of SCL during ACK cycles. Setting this value will increase setup time in units of 640ns. The nominal output setup time value for SDA to SCL are: 00 : 80ns 01: 720ns 10: 1400ns 11: 2080ns |
3:2 | SDA_OUTPUT_DELAY | R/W | 0x0 | SDA Output Delay This field configures additional delay on the SDA output relative to the falling edge of SCL. Setting this value increases output delay in units of 40ns. Nominal output delay values for SCL to SDA are: 00 : 240ns 01: 280ns 10: 320ns 11: 360ns |
1 | I2C_BUS_TIMER _SPEEDUP | R/W | 0x0 | Speed up I2C Bus Watchdog Timer 1: Watchdog Timer expires after approximately 50 microseconds 0: Watchdog Timer expires after approximately 1 second. |
0 | I2C_BUS_TIMER _DISABLE | R/W | 0x0 | Disable I2C Bus Watchdog Timer When enabled, the I2C Watchdog Timer may be used to detect when the I2C bus is free or hung up following an invalid termination of a transaction. If SDA is high and no signalling occurs for approximately 1 second, the I2C bus is assumed to be free. If SDA is low and no signaling occurs, the device will attempt to clear the bus by driving 9 clocks on SCL |