JAJSDW4 データシート

JAJSDW4C August 2017 – January 2023 DS90UB954-Q1

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RGZ|48
- MPQF123F

サーマルパッド・メカニカル・データ

RGZ|48
- QFND014T

発注情報

8.2.1 Design Requirements

For the typical design application, use the parameters listed in Table 8-4.

Table 8-4 Design Parameters

DESIGN PARAMETER	EXAMPLE VALUE
V_(VDDIO)	1.8 V or 3.3 V
V_(VDD18)	1.8 V
V_(VDD11)( When VDD_SEL = HIGH)	1.1 V
AC-coupling Capacitor for Synchronous Modes, Coaxial Connection: RIN0+ ,RIN1+	33 nF - 100nF (50 WV 0402)
AC-coupling Capacitor for Synchronous Modes, Coaxial Connection: RIN0- ,RIN1-	15 nF - 47nF (50 WV 0402)
AC-coupling Capacitor for Synchronous Modes, STP Connection: RIN0± ,RIN1±	33 nF - 100nF (50 WV 0402)
AC-coupling Capacitor for Non-Synchronous and DVP Backwards Compatible Modes, Coaxial Connection: RIN0+, RIN1+	100 nF (50 WV 0402)
AC-coupling Capacitor for Non-Synchronous and DVP Backwards Compatible Modes, Coaxial Connection: RIN0-, RIN1-	47 nF (50 WV 0402)
AC-coupling Capacitor for Non-Synchronous and DVP Backwards Compatible Modes, STP Connection: RIN0±, RIN1±	100 nF (50 WV 0402)

The SER/DES supports only AC-coupled interconnects through an integrated DC-balanced decoding scheme. External AC-coupling capacitors must be placed in series in the FPD-Link III signal path as shown in #SNLS4791057A and #SNLS4791056. When connected to the DS90UB935-Q1 or DS90UB953-Q1 serializer operating with 10-Mbps back channel, the higher value AC-coupling capacitors are recommended to reduce low frequency attenuation. For applications using single-ended 50-Ω coaxial cable, terminate the unused data pins (RIN0–, RIN1–) with an AC-coupling capacitor and a 50-Ω resistor.

Figure 8-6 AC-Coupled Connection (Coaxial)

Figure 8-7 AC-Coupled Connection (STP)

For high-speed FPD–Link III transmissions, use the smallest available package for the AC-coupling capacitor to help minimize degradation of signal quality due to package parasitics.