JAJSFU9B
July 2018 – October 2023
ESD321
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings – JEDEC Specifications
6.3
ESD Ratings – IEC Specifications
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Signal Range
8.2.2.2
Operating Frequency
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DPY|2
MPSS034D
DYA|2
MPSS124A
サーマルパッド・メカニカル・データ
発注情報
jajsfu9b_oa
jajsfu9b_pm
6.7
Typical Characteristics
Figure 6-1
TLP I-V Curve, I/O Pin to GND (t
p
= 100 ns)
Figure 6-3
8-kV IEC 61000-4-2 Clamping Voltage Waveform, I/O Pin to GND
Figure 6-5
DC Voltage Sweep I-V Curve, I/O Pin to GND
Figure 6-7
Capacitance vs. Bias Voltage For Different Temperatures (°C)
Figure 6-9
Insertion Loss vs. Frequency
Figure 6-2
TLP I-V Curve, GND to I/O Pin (t
p
= 100 ns)
Figure 6-4
8-kV IEC 61000-4-2 Clamping Voltage Waveform, GND to I/O Pin
Figure 6-6
Surge Curve (IEC 61000-4-5, t
p
=8/20 µs), I/O Pin to GND
Figure 6-8
Leakage Current (at 3.6 V Bias) Across Temperature, I/O Pin to GND