SPRSP93 November   2024 F29H850TU , F29H859TU-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
    1. 3.1 Functional Block Diagram
  5. 4 Device Comparison
    1. 4.1 Related Products
  6. 5 Pin Configuration and Functions
    1. 5.1 Pin Diagrams
    2. 5.2 Pin Attributes
    3. 5.3 Signal Descriptions
      1. 5.3.1 Analog Signals
      2. 5.3.2 Digital Signals
      3. 5.3.3 Power and Ground
      4. 5.3.4 Test, JTAG, and Reset
    4. 5.4 Pins With Internal Pullup and Pulldown
    5. 5.5 Pin Multiplexing
      1. 5.5.1 GPIO Muxed Pins
    6. 5.6 Connections for Unused Pins
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  F29H85x ESD Ratings – Commercial
    3. 6.3  F29H85x ESD Ratings – Automotive
    4. 6.4  F29P58x ESD Ratings – Commercial
    5. 6.5  F29P58x ESD Ratings – Automotive
    6. 6.6  Recommended Operating Conditions
    7. 6.7  Power Consumption Summary
      1. 6.7.1 System Current Consumption VREG Enabled
      2. 6.7.2 System Current Consumption VREG Disable - External Supply
      3. 6.7.3 Operating Mode Test Description
      4. 6.7.4 Reducing Current Consumption
        1. 6.7.4.1 Typical Current Reduction per Disabled Peripheral
    8. 6.8  Electrical Characteristics
    9. 6.9  Thermal Resistance Characteristics for ZEX Package
    10. 6.10 Thermal Resistance Characteristics for PTS Package
    11. 6.11 Thermal Resistance Characteristics for RFS Package
    12. 6.12 Thermal Resistance Characteristics for PZS Package
    13. 6.13 Thermal Design Considerations
    14. 6.14 System
      1. 6.14.1  Power Management Module (PMM)
        1. 6.14.1.1 Introduction
        2. 6.14.1.2 Overview
          1. 6.14.1.2.1 Power Rail Monitors
            1. 6.14.1.2.1.1 I/O POR (Power-On Reset) Monitor
            2. 6.14.1.2.1.2 I/O BOR (Brown-Out Reset) Monitor
            3. 6.14.1.2.1.3 VDD POR (Power-On Reset) Monitor
          2. 6.14.1.2.2 External Supervisor Usage
          3. 6.14.1.2.3 Delay Blocks
          4. 6.14.1.2.4 Internal 1.2-V LDO Voltage Regulator (VREG)
          5. 6.14.1.2.5 VREGENZ
        3. 6.14.1.3 External Components
          1. 6.14.1.3.1 Decoupling Capacitors
            1. 6.14.1.3.1.1 VDDIO Decoupling
            2. 6.14.1.3.1.2 VDD Decoupling
        4. 6.14.1.4 Power Sequencing
          1. 6.14.1.4.1 Supply Pins Ganging
          2. 6.14.1.4.2 Signal Pins Power Sequence
          3. 6.14.1.4.3 Supply Pins Power Sequence
            1. 6.14.1.4.3.1 External VREG/VDD Mode Sequence
            2. 6.14.1.4.3.2 Internal VREG/VDD Mode Sequence
            3. 6.14.1.4.3.3 Supply Sequencing Summary and Effects of Violations
            4. 6.14.1.4.3.4 Supply Slew Rate
        5. 6.14.1.5 Power Management Module Electrical Data and Timing
          1. 6.14.1.5.1 Power Management Module Operating Conditions
          2. 6.14.1.5.2 Power Management Module Characteristics
      2. 6.14.2  Reset Timing
        1. 6.14.2.1 Reset Sources
        2. 6.14.2.2 Reset Electrical Data and Timing
          1. 6.14.2.2.1 Reset XRSn Timing Requirements
          2. 6.14.2.2.2 Reset XRSn Switching Characteristics
          3. 6.14.2.2.3 Reset Timing Diagrams
      3. 6.14.3  Clock Specifications
        1. 6.14.3.1 Clock Sources
        2. 6.14.3.2 Clock Frequencies, Requirements, and Characteristics
          1. 6.14.3.2.1 Input Clock Frequency and Timing Requirements, PLL Lock Times
            1. 6.14.3.2.1.1 Input Clock Frequency
            2. 6.14.3.2.1.2 XTAL Oscillator Characteristics
            3. 6.14.3.2.1.3 X1 Input Level Characteristics When Using an External Clock Source Not a Crystal
            4. 6.14.3.2.1.4 X1 Timing Requirements
            5. 6.14.3.2.1.5 AUXCLKIN Timing Requirements
            6. 6.14.3.2.1.6 APLL Characteristics
            7. 6.14.3.2.1.7 XCLKOUT Switching Characteristics PLL Bypassed or Enabled
        3. 6.14.3.3 Input Clocks
        4. 6.14.3.4 XTAL Oscillator
          1. 6.14.3.4.1 Introduction
          2. 6.14.3.4.2 Overview
            1. 6.14.3.4.2.1 Electrical Oscillator
              1. 6.14.3.4.2.1.1 Modes of Operation
                1. 6.14.3.4.2.1.1.1 Crystal Mode of Operation
                2. 6.14.3.4.2.1.1.2 Single-Ended Mode of Operation
              2. 6.14.3.4.2.1.2 XTAL Output on XCLKOUT
            2. 6.14.3.4.2.2 Quartz Crystal
            3. 6.14.3.4.2.3 GPIO Modes of Operation
          3. 6.14.3.4.3 Functional Operation
            1. 6.14.3.4.3.1 ESR – Effective Series Resistance
            2. 6.14.3.4.3.2 Rneg – Negative Resistance
            3. 6.14.3.4.3.3 Start-up Time
            4. 6.14.3.4.3.4 DL – Drive Level
          4. 6.14.3.4.4 How to Choose a Crystal
          5. 6.14.3.4.5 Testing
          6. 6.14.3.4.6 Common Problems and Debug Tips
          7. 6.14.3.4.7 Crystal Oscillator Specifications
            1. 6.14.3.4.7.1 Crystal Oscillator Electrical Characteristics
            2. 6.14.3.4.7.2 Crystal Equivalent Series Resistance (ESR) Requirements
            3. 6.14.3.4.7.3 Crystal Oscillator Parameters
            4. 6.14.3.4.7.4 Crystal Oscillator Electrical Characteristics
        5. 6.14.3.5 Internal Oscillators
          1. 6.14.3.5.1 INTOSC Characteristics
      4. 6.14.4  Flash Parameters
        1. 6.14.4.1 Flash Parameters 
      5. 6.14.5  Memory Subsystem (MEMSS)
        1. 6.14.5.1 Introduction
        2. 6.14.5.2 Features
        3. 6.14.5.3 RAM Specifications
      6. 6.14.6  Debug/JTAG
        1. 6.14.6.1 JTAG Electrical Data and Timing
          1. 6.14.6.1.1 DEBUGSS Timing Requirements
          2. 6.14.6.1.2 DEBUGSS Switching Characteristics
          3. 6.14.6.1.3 JTAG Timing Diagram
          4. 6.14.6.1.4 SWD Timing Diagram
      7. 6.14.7  GPIO Electrical Data and Timing
        1. 6.14.7.1 GPIO – Output Timing
          1. 6.14.7.1.1 General-Purpose Output Switching Characteristics
          2. 6.14.7.1.2 General-Purpose Output Timing Diagram
        2. 6.14.7.2 GPIO – Input Timing
          1. 6.14.7.2.1 General-Purpose Input Timing Requirements
          2. 6.14.7.2.2 Sampling Mode
        3. 6.14.7.3 Sampling Window Width for Input Signals
      8. 6.14.8  Real-Time Direct Memory Access (RTDMA)
        1. 6.14.8.1 Introduction
          1. 6.14.8.1.1 Features
          2. 6.14.8.1.2 Block Diagram
      9. 6.14.9  Low-Power Modes
        1. 6.14.9.1 Clock-Gating Low-Power Modes
        2. 6.14.9.2 Low-Power Mode Wake-up Timing
          1. 6.14.9.2.1 IDLE Mode Timing Requirements
          2. 6.14.9.2.2 IDLE Mode Switching Characteristics
          3. 6.14.9.2.3 IDLE Entry and Exit Timing Diagram
          4. 6.14.9.2.4 STANDBY Mode Timing Requirements
          5. 6.14.9.2.5 STANDBY Mode Switching Characteristics
          6. 6.14.9.2.6 STANDBY Entry and Exit Timing Diagram
      10. 6.14.10 External Memory Interface (EMIF)
        1. 6.14.10.1 Asynchronous Memory Support
        2. 6.14.10.2 Synchronous DRAM Support
        3. 6.14.10.3 EMIF Electrical Data and Timing
          1. 6.14.10.3.1 EMIF Synchronous Memory Timing Requirements
          2. 6.14.10.3.2 EMIF Synchronous Memory Switching Characteristics
          3. 6.14.10.3.3 EMIF Synchronous Memory Timing Diagrams
          4. 6.14.10.3.4 EMIF Asynchronous Memory Timing Requirements
          5. 6.14.10.3.5 EMIF Asynchronous Memory Switching Characteristics
          6. 6.14.10.3.6 EMIF Asynchronous Memory Timing Diagrams
    15. 6.15 C29x Analog Peripherals
      1. 6.15.1 Analog Subsystem
        1. 6.15.1.1 Features
        2. 6.15.1.2 Block Diagram
        3. 6.15.1.3 Analog Pin Connections
      2. 6.15.2 Analog-to-Digital Converter (ADC)
        1. 6.15.2.1 ADC Configurability
          1. 6.15.2.1.1 Signal Mode
        2. 6.15.2.2 ADC Electrical Data and Timing
          1. 6.15.2.2.1  ADC Operating Conditions 12-bit Single-Ended
          2. 6.15.2.2.2  ADC Operating Conditions 12-bit Differential
          3. 6.15.2.2.3  ADC Operating Conditions 16-bit Single-Ended
          4. 6.15.2.2.4  ADC Operating Conditions 16-bit Differential
          5. 6.15.2.2.5  ADC Timing Requirements
          6. 6.15.2.2.6  ADC Characteristics 12-bit Single-Ended
          7. 6.15.2.2.7  ADC Characteristics 12-bit Differential
          8. 6.15.2.2.8  ADC Characteristics 16-bit Single-Ended
          9. 6.15.2.2.9  ADC Characteristics 16-bit Differential
          10. 6.15.2.2.10 ADC INL and DNL
          11. 6.15.2.2.11 ADC Input Model Models
          12. 6.15.2.2.12 ADC Timing Diagrams
      3. 6.15.3 Temperature Sensor
        1. 6.15.3.1 Temperature Sensor Electrical Data and Timing
          1. 6.15.3.1.1 Temperature Sensor Characteristics
      4. 6.15.4 Comparator Subsystem (CMPSS)
        1. 6.15.4.1 CMPSS Connectivity Diagram
        2. 6.15.4.2 Block Diagram
        3. 6.15.4.3 CMPSS Electrical Data and Timing
          1. 6.15.4.3.1 Comparator Electrical Characteristics
          2.        CMPSS Comparator Input Referred Offset and Hysteresis
          3. 6.15.4.3.2 CMPSS DAC Static Electrical Characteristics
          4. 6.15.4.3.3 CMPSS Illustrative Graphs
      5. 6.15.5 Buffered Digital-to-Analog Converter (DAC)
        1. 6.15.5.1 Buffered DAC Electrical Data and Timing
          1. 6.15.5.1.1 Buffered DAC Operating Conditions
          2. 6.15.5.1.2 Buffered DAC Electrical Characteristics
    16. 6.16 C29x Control Peripherals
      1. 6.16.1 Enhanced Capture (eCAP)
        1. 6.16.1.1 eCAP Block Diagram
        2. 6.16.1.2 eCAP Synchronization
        3. 6.16.1.3 eCAP Electrical Data and Timing
          1. 6.16.1.3.1 eCAP Timing Requirements
          2. 6.16.1.3.2 eCAP Switching Characteristics
      2. 6.16.2 High-Resolution Capture (HRCAP)
        1. 6.16.2.1 eCAP and HRCAP Block Diagram
        2. 6.16.2.2 HRCAP Electrical Data and Timing
          1. 6.16.2.2.1 HRCAP Switching Characteristics
          2. 6.16.2.2.2 HRCAP Figure and Graph
      3. 6.16.3 Enhanced Pulse Width Modulator (ePWM)
        1. 6.16.3.1 Control Peripherals Synchronization
        2. 6.16.3.2 ePWM Electrical Data and Timing
          1. 6.16.3.2.1 ePWM Timing Requirements
          2. 6.16.3.2.2 ePWM Switching Characteristics
          3. 6.16.3.2.3 Trip-Zone Input Timing
            1. 6.16.3.2.3.1 PWM Hi-Z Characteristics Timing Diagram
      4. 6.16.4 External ADC Start-of-Conversion Electrical Data and Timing
        1. 6.16.4.1 External ADC Start-of-Conversion Switching Characteristics
        2. 6.16.4.2 ADCSOCAO or ADCSOCBO Timing Diagram
      5. 6.16.5 High-Resolution Pulse Width Modulator (HRPWM)
        1. 6.16.5.1 HRPWM Electrical Data and Timing
          1. 6.16.5.1.1 High-Resolution PWM Characteristics
      6. 6.16.6 Enhanced Quadrature Encoder Pulse (eQEP)
        1. 6.16.6.1 eQEP Electrical Data and Timing
          1. 6.16.6.1.1 eQEP Timing Requirements
          2. 6.16.6.1.2 eCAP Switching Characteristics
      7. 6.16.7 Sigma-Delta Filter Module (SDFM)
        1. 6.16.7.1 SDFM Electrical Data and Timing
          1. 6.16.7.1.1 SDFM Electrical Data and Timing (Synchronized GPIO)
          2. 6.16.7.1.2 SDFM Electrical Data and Timing (Using ASYNC)
            1. 6.16.7.1.2.1 SDFM Timing Requirements When Using Asynchronous GPIO ASYNC Option
            2. 6.16.7.1.2.2 SDFM Timing Requirements When Using Synchronous GPIO SYNC Option
          3. 6.16.7.1.3 SDFM Timing Diagram
    17. 6.17 C29x Communications Peripherals
      1. 6.17.1 Modular Controller Area Network (MCAN)
      2. 6.17.2 Fast Serial Interface (FSI)
        1. 6.17.2.1 FSI Transmitter
          1. 6.17.2.1.1 FSITX Electrical Data and Timing
            1. 6.17.2.1.1.1 FSITX Switching Characteristics
            2. 6.17.2.1.1.2 FSITX Timings
        2. 6.17.2.2 FSI Receiver
          1. 6.17.2.2.1 FSIRX Electrical Data and Timing
            1. 6.17.2.2.1.1 FSIRX Timing Requirements
            2. 6.17.2.2.1.2 FSIRX Switching Characteristics
            3. 6.17.2.2.1.3 FSIRX Timings
        3. 6.17.2.3 FSI SPI Compatibility Mode
          1. 6.17.2.3.1 FSITX SPI Signaling Mode Electrical Data and Timing
            1. 6.17.2.3.1.1 FSITX SPI Signaling Mode Switching Characteristics
            2. 6.17.2.3.1.2 FSITX SPI Signaling Mode Timings
      3. 6.17.3 Inter-Integrated Circuit (I2C)
        1. 6.17.3.1 I2C Electrical Data and Timing
          1. 6.17.3.1.1 I2C Timing Requirements
          2. 6.17.3.1.2 I2C Switching Characteristics
          3. 6.17.3.1.3 I2C Timing Diagram
      4. 6.17.4 Power Management Bus (PMBus) Interface
        1. 6.17.4.1 PMBus Electrical Data and Timing
          1. 6.17.4.1.1 PMBus Electrical Characteristics
          2. 6.17.4.1.2 PMBus Fast Plus Mode Switching Characteristics
          3. 6.17.4.1.3 PMBus Fast Mode Switching Characteristics
          4. 6.17.4.1.4 PMBus Standard Mode Switching Characteristics
      5. 6.17.5 Serial Peripheral Interface (SPI)
        1. 6.17.5.1 SPI Controller Mode Timings
          1. 6.17.5.1.1 SPI Controller Mode Switching Characteristics Clock Phase 0
          2. 6.17.5.1.2 SPI Controller Mode Switching Characteristics Clock Phase 1
          3. 6.17.5.1.3 SPI Controller Mode Timing Requirements
          4. 6.17.5.1.4 SPI Controller Mode Timing Diagrams
        2. 6.17.5.2 SPI Peripheral Mode Timings
          1. 6.17.5.2.1 SPI Peripheral Mode Switching Characteristics
          2. 6.17.5.2.2 SPI Peripheral Mode Timing Requirements
          3. 6.17.5.2.3 SPI Peripheral Mode Timing Diagrams
      6. 6.17.6 Single Edge Nibble Transmission (SENT)
        1. 6.17.6.1 Introduction
        2. 6.17.6.2 Features
      7. 6.17.7 Local Interconnect Network (LIN)
      8. 6.17.8 EtherCAT SubordinateDevice Controller (ESC)
        1. 6.17.8.1 ESC Features
        2. 6.17.8.2 ESC Subsystem Integrated Features
        3. 6.17.8.3 EtherCAT IP Block Diagram
        4. 6.17.8.4 EtherCAT Electrical Data and Timing
          1. 6.17.8.4.1 EtherCAT Timing Requirements
          2. 6.17.8.4.2 EtherCAT Switching Characteristics
          3. 6.17.8.4.3 EtherCAT Timing Diagrams
      9. 6.17.9 Universal Asynchronous Receiver-Transmitter (UART)
  8. 7 Detailed Description
    1. 7.1  Overview
    2. 7.2  Functional Block Diagram
    3. 7.3  Error Signaling Module (ESM_C29)
      1. 7.3.1 Introduction
      2. 7.3.2 ESM Subsystem
      3. 7.3.3 System ESM
    4. 7.4  Error Aggregator
      1. 7.4.1 Error Aggregator Modules
      2. 7.4.2 Error Aggregator Interface
    5. 7.5  Memory
      1. 7.5.1 C29x Memory Map
      2. 7.5.2 Flash Memory Map
        1. 7.5.2.1 Flash MAIN Region Address Map (F29H85x, 4MB)
        2. 7.5.2.2 Flash MAIN Region Address Map (F29H85x, 2MB)
        3. 7.5.2.3 Flash MAIN Region Address Map (F29P58x, 4MB)
        4. 7.5.2.4 Flash MAIN Region Address Map (F29P58x, 2MB)
        5. 7.5.2.5 Flash MAIN Region Address MAP (F29P58x, 1MB)
        6. 7.5.2.6 Flash Data Bank Address Map
        7. 7.5.2.7 Flash BANKMGMT Region Address Map
        8. 7.5.2.8 Flash SECCFG Region Address Map
      3. 7.5.3 Peripheral Registers Memory Map
    6. 7.6  Identification
    7. 7.7  Boot ROM
      1. 7.7.1 Device Boot Sequence
      2. 7.7.2 Device Boot Modes
        1. 7.7.2.1 Default Boot Modes
        2. 7.7.2.2 Custom Boot Modes
      3. 7.7.3 Device Boot Configurations
        1. 7.7.3.1 Configuring Boot Mode Pins
        2. 7.7.3.2 Configuring Boot Mode Table Options
      4. 7.7.4 Device Boot Flow Diagrams
        1. 7.7.4.1 Device Boot Flow
        2. 7.7.4.2 CPU1 Boot Flow
        3. 7.7.4.3 Emulation Boot Flow
        4. 7.7.4.4 Stand-alone Boot Flow
      5. 7.7.5 GPIO Assignments
    8. 7.8  Security Modules and Cryptographic Accelerators
      1. 7.8.1 Security Modules
        1. 7.8.1.1 Hardware Security Module (HSM)
        2. 7.8.1.2 Cryptographic Accelerators
      2. 7.8.2 Safety and Security Unit (SSU)
        1. 7.8.2.1 System View
    9. 7.9  C29x Subsystem
      1. 7.9.1 C29 CPU Architecture
      2. 7.9.2 Peripheral Interrupt Priority and Expansion (PIPE)
        1. 7.9.2.1 Introduction
          1. 7.9.2.1.1 Features
          2. 7.9.2.1.2 Interrupt Concepts
        2. 7.9.2.2 Interrupt Architecture
          1. 7.9.2.2.1 Dynamic Priority Arbitration Block
          2. 7.9.2.2.2 Post Processing Block
          3. 7.9.2.2.3 Memory Mapped Registers
        3. 7.9.2.3 Interrupt Propagation
      3. 7.9.3 Data Logging and Trace (DLT)
        1. 7.9.3.1 Introduction
          1. 7.9.3.1.1 Features
            1. 7.9.3.1.1.1 Block Diagram
      4. 7.9.4 Waveform Analyzer Diagnostics (WADI)
        1. 7.9.4.1 WADI Overview
          1. 7.9.4.1.1 Features
          2. 7.9.4.1.2 Block Diagram
          3. 7.9.4.1.3 Description
      5. 7.9.5 Embedded Real-Time Analysis and Diagnostic (ERAD)
      6. 7.9.6 Inter-Processor Communications (IPC)
        1. 7.9.6.1 Introduction
      7. 7.9.7 Watchdog
      8. 7.9.8 Dual-Clock Comparator (DCC)
        1. 7.9.8.1 Features
        2. 7.9.8.2 Mapping of DCCx Clock Source Inputs
      9. 7.9.9 Configurable Logic Block (CLB)
    10. 7.10 Lockstep Compare Module (LCM)
  9. 8 Applications, Implementation, and Layout
    1. 8.1 Reference Design
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Markings
    3. 9.3 Tools and Software
    4. 9.4 Documentation Support
    5. 9.5 Support Resources
    6. 9.6 Trademarks
    7. 9.7 Electrostatic Discharge Caution
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Packaging Information
    2.     TRAY

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PZS|100
  • PTS|176
  • RFS|144
  • ZEX|256
サーマルパッド・メカニカル・データ
発注情報

5.2 Pin Attributes

Table 5-1 Pin Attributes
SIGNAL NAME MUX POSITION 256 ZEX 176 PTS 144 RFS 100 PZS PIN TYPE DESCRIPTION
ANALOG
A0 R1 44 36 25 I ADC-A Input 0
C24 I ADC-C Input 24
DACA_OUT O Buffered DAC-A Output.
AIO160 0, 4, 8, 12 I Analog Pin Used For Digital Input 160 This pin also has digital mux functions which are described in the GPIO section of this table.
A1 P1 43 35 24 I ADC-A Input 1
C25 I ADC-C Input 25
CMP4_HN0 I CMPSS-4 High Comparator Negative Input 0
CMP4_LN0 I CMPSS-4 Low Comparator Negative Input 0
AIO161 0, 4, 8, 12 I Analog Pin Used For Digital Input 161 This pin also has digital mux functions which are described in the GPIO section of this table.
A2 M1 36 28 I ADC-A Input 2
CMP1_HP1 I CMPSS-1 High Comparator Positive Input 1
CMP1_LP1 I CMPSS-1 Low Comparator Positive Input 1
CMP9_HN0 I CMPSS-9 High Comparator Negative Input 0
CMP9_LN0 I CMPSS-9 Low Comparator Negative Input 0
D24 I ADC-D Input 24
AIO162 0, 4, 8, 12 I Analog Pin Used For Digital Input 162 This pin also has digital mux functions which are described in the GPIO section of this table.
A3 M2 35 27 I ADC-A Input 3
CMP1_HN1 I CMPSS-1 High Comparator Negative Input 1
CMP1_HP2 I CMPSS-1 High Comparator Positive Input 2
CMP1_LN1 I CMPSS-1 Low Comparator Negative Input 1
CMP1_LP2 I CMPSS-1 Low Comparator Positive Input 2
D25 I ADC-D Input 25
AIO163 0, 4, 8, 12 I Analog Pin Used For Digital Input 163 This pin also has digital mux functions which are described in the GPIO section of this table.
A4 L2 32 24 I ADC-A Input 4
CMP1_HP0 I CMPSS-1 High Comparator Positive Input 0
CMP1_LP0 I CMPSS-1 Low Comparator Positive Input 0
CMP2_HN1 I CMPSS-2 High Comparator Negative Input 1
CMP2_LN1 I CMPSS-2 Low Comparator Negative Input 1
D28 I ADC-D Input 28
AIO164 0, 4, 8, 12 I Analog Pin Used For Digital Input 164 This pin also has digital mux functions which are described in the GPIO section of this table.
A5 L1 31 23 I ADC-A Input 5
CMP1_HN0 I CMPSS-1 High Comparator Negative Input 0
CMP1_LN0 I CMPSS-1 Low Comparator Negative Input 0
D29 I ADC-D Input 29
AIO165 0, 4, 8, 12 I Analog Pin Used For Digital Input 165 This pin also has digital mux functions which are described in the GPIO section of this table.
A6 L5 26 18 13 I ADC-A Input 6
CMP2_HP0 I CMPSS-2 High Comparator Positive Input 0
CMP2_LP0 I CMPSS-2 Low Comparator Positive Input 0
CMP12_HN0 I CMPSS-12 High Comparator Negative Input 0
CMP12_LN0 I CMPSS-12 Low Comparator Negative Input 0
E24 I ADC-E Input 24
GPIO224 0, 4, 8, 12 I/O General-Purpose Input Output 224 This pin also has digital mux functions which are described in the GPIO section of this table.
A7 K5 25 17 12 I ADC-A Input 7
CMP2_HN0 I CMPSS-2 High Comparator Negative Input 0
CMP2_LN0 I CMPSS-2 Low Comparator Negative Input 0
CMP9_HP2 I CMPSS-9 High Comparator Positive Input 2
CMP9_LP2 I CMPSS-9 Low Comparator Positive Input 2
E25 I ADC-E Input 25
GPIO225 0, 4, 8, 12 I/O General-Purpose Input Output 225 This pin also has digital mux functions which are described in the GPIO section of this table.
A8 H4 22 16 I ADC-A Input 8
CMP8_LP3 I CMPSS-8 Low Comparator Positive Input 3
GPIO226 0, 4, 8, 12 I/O General-Purpose Input Output 226 This pin also has digital mux functions which are described in the GPIO section of this table.
A9 H3 21 I ADC-A Input 9
CMP6_HP4 I CMPSS-6 High Comparator Positive Input 4
GPIO227 0, 4, 8, 12 I/O General-Purpose Input Output 227 This pin also has digital mux functions which are described in the GPIO section of this table.
A10 G3 18 I ADC-A Input 10
CMP7_HP4 I CMPSS-7 High Comparator Positive Input 4
GPIO228 0, 4, 8, 12 I/O General-Purpose Input Output 228 This pin also has digital mux functions which are described in the GPIO section of this table.
A11 G4 17 I ADC-A Input 11
CMP8_HP4 I CMPSS-8 High Comparator Positive Input 4
GPIO229 0, 4, 8, 12 I/O General-Purpose Input Output 229 This pin also has digital mux functions which are described in the GPIO section of this table.
A12 K2 I ADC-A Input 12
CMP1_HP5 I CMPSS-1 High Comparator Positive Input 5
CMP1_LP5 I CMPSS-1 Low Comparator Positive Input 5
AIO166 0, 4, 8, 12 I Analog Pin Used For Digital Input 166 This pin also has digital mux functions which are described in the GPIO section of this table.
A13 K1 I ADC-A Input 13
CMP2_HP5 I CMPSS-2 High Comparator Positive Input 5
CMP2_LP5 I CMPSS-2 Low Comparator Positive Input 5
AIO167 0, 4, 8, 12 I Analog Pin Used For Digital Input 167 This pin also has digital mux functions which are described in the GPIO section of this table.
A14 M3 40 32 21 I ADC-A Input 14
B14 I ADC-B Input 14
C14 I ADC-C Input 14
D14 I ADC-D Input 14
E14 I ADC-E Input 14
AIO168 0, 4, 8, 12 I Analog Pin Used For Digital Input 168 This pin also has digital mux functions which are described in the GPIO section of this table.
A15 M4 39 31 20 I ADC-A Input 15
B15 I ADC-B Input 15
C15 I ADC-C Input 15
D15 I ADC-D Input 15
E15 I ADC-E Input 15
AIO169 0, 4, 8, 12 I Analog Pin Used For Digital Input 169 This pin also has digital mux functions which are described in the GPIO section of this table.
B0 P2 42 34 23 I ADC-B Input 0
C26 I ADC-C Input 26
VDAC I Optional external reference voltage for on-chip DACs.
AIO170 0, 4, 8, 12 I Analog Pin Used For Digital Input 170 This pin also has digital mux functions which are described in the GPIO section of this table.
B1 N3 41 33 22 I ADC-B Input 1
C27 I ADC-C Input 27
CMP3_HP2 I CMPSS-3 High Comparator Positive Input 2
CMP3_LP2 I CMPSS-3 Low Comparator Positive Input 2
AIO171 0, 4, 8, 12 I Analog Pin Used For Digital Input 171 This pin also has digital mux functions which are described in the GPIO section of this table.
B2 L4 34 26 17 I ADC-B Input 2
D26 I ADC-D Input 26
AIO172 0, 4, 8, 12 I Analog Pin Used For Digital Input 172 This pin also has digital mux functions which are described in the GPIO section of this table.
B3 L3 33 25 16 I ADC-B Input 3
CMP1_HP3 I CMPSS-1 High Comparator Positive Input 3
CMP1_LP3 I CMPSS-1 Low Comparator Positive Input 3
CMP3_HN0 I CMPSS-3 High Comparator Negative Input 0
CMP3_LN0 I CMPSS-3 Low Comparator Negative Input 0
D27 I ADC-D Input 27
AIO173 0, 4, 8, 12 I Analog Pin Used For Digital Input 173 This pin also has digital mux functions which are described in the GPIO section of this table.
B4 K4 30 22 I ADC-B Input 4
CMP7_HN1 I CMPSS-7 High Comparator Negative Input 1
CMP7_HP1 I CMPSS-7 High Comparator Positive Input 1
CMP7_LN1 I CMPSS-7 Low Comparator Negative Input 1
CMP7_LP1 I CMPSS-7 Low Comparator Positive Input 1
D30 I ADC-D Input 30
AIO174 0, 4, 8, 12 I Analog Pin Used For Digital Input 174 This pin also has digital mux functions which are described in the GPIO section of this table.
B5 K3 29 21 I ADC-B Input 5
CMP3_HN1 I CMPSS-3 High Comparator Negative Input 1
CMP3_LN1 I CMPSS-3 Low Comparator Negative Input 1
CMP7_HP2 I CMPSS-7 High Comparator Positive Input 2
CMP7_LP2 I CMPSS-7 Low Comparator Positive Input 2
D31 I ADC-D Input 31
AIO175 0, 4, 8, 12 I Analog Pin Used For Digital Input 175 This pin also has digital mux functions which are described in the GPIO section of this table.
B6 J5 24 I ADC-B Input 6
CMP9_HP4 I CMPSS-9 High Comparator Positive Input 4
CMP11_HN0 I CMPSS-11 High Comparator Negative Input 0
CMP11_LN0 I CMPSS-11 Low Comparator Negative Input 0
E26 I ADC-E Input 26
GPIO230 0, 4, 8, 12 I/O General-Purpose Input Output 230 This pin also has digital mux functions which are described in the GPIO section of this table.
B7 H5 23 I ADC-B Input 7
CMP10_HP4 I CMPSS-10 High Comparator Positive Input 4
E27 I ADC-E Input 27
GPIO231 0, 4, 8, 12 I/O General-Purpose Input Output 231 This pin also has digital mux functions which are described in the GPIO section of this table.
B8 H2 20 15 11 I ADC-B Input 8
GPIO232 0, 4, 8, 12 I/O General-Purpose Input Output 232 This pin also has digital mux functions which are described in the GPIO section of this table.
B9 H1 19 14 10 I ADC-B Input 9
GPIO233 0, 4, 8, 12 I/O General-Purpose Input Output 233 This pin also has digital mux functions which are described in the GPIO section of this table.
B10 G2 16 13 I ADC-B Input 10
CMP5_LP4 I CMPSS-5 Low Comparator Positive Input 4
GPIO234 0, 4, 8, 12 I/O General-Purpose Input Output 234 This pin also has digital mux functions which are described in the GPIO section of this table.
B11 G1 15 12 I ADC-B Input 11
CMP6_LP4 I CMPSS-6 Low Comparator Positive Input 4
GPIO235 0, 4, 8, 12 I/O General-Purpose Input Output 235 This pin also has digital mux functions which are described in the GPIO section of this table.
B12 J2 I ADC-B Input 12
CMP7_LP4 I CMPSS-7 Low Comparator Positive Input 4
AIO176 0, 4, 8, 12 I Analog Pin Used For Digital Input 176 This pin also has digital mux functions which are described in the GPIO section of this table.
B13 J1 I ADC-B Input 13
CMP8_LP4 I CMPSS-8 Low Comparator Positive Input 4
AIO177 0, 4, 8, 12 I Analog Pin Used For Digital Input 177 This pin also has digital mux functions which are described in the GPIO section of this table.
B16 J4 I ADC-B Input 16
CMP9_HP5 I CMPSS-9 High Comparator Positive Input 5
AIO178 0, 4, 8, 12 I Analog Pin Used For Digital Input 178 This pin also has digital mux functions which are described in the GPIO section of this table.
B17 J3 I ADC-B Input 17
CMP10_HP5 I CMPSS-10 High Comparator Positive Input 5
AIO179 0, 4, 8, 12 I Analog Pin Used For Digital Input 179 This pin also has digital mux functions which are described in the GPIO section of this table.
C0 R2 45 37 26 I ADC-C Input 0
E28 I ADC-E Input 28
AIO180 0, 4, 8, 12 I Analog Pin Used For Digital Input 180 This pin also has digital mux functions which are described in the GPIO section of this table.
C1 T2 46 38 27 I ADC-C Input 1
E29 I ADC-E Input 29
AIO181 0, 4, 8, 12 I Analog Pin Used For Digital Input 181 This pin also has digital mux functions which are described in the GPIO section of this table.
C2 N4 51 43 I ADC-C Input 2
CMP9_HP1 I CMPSS-9 High Comparator Positive Input 1
CMP9_LP1 I CMPSS-9 Low Comparator Positive Input 1
CMP11_HN1 I CMPSS-11 High Comparator Negative Input 1
CMP11_LN1 I CMPSS-11 Low Comparator Negative Input 1
E30 I ADC-E Input 30
AIO182 0, 4, 8, 12 I Analog Pin Used For Digital Input 182 This pin also has digital mux functions which are described in the GPIO section of this table.
C3 M5 52 44 I ADC-C Input 3
CMP9_LP4 I CMPSS-9 Low Comparator Positive Input 4
E31 I ADC-E Input 31
AIO183 0, 4, 8, 12 I Analog Pin Used For Digital Input 183 This pin also has digital mux functions which are described in the GPIO section of this table.
C4 P5 55 47 I ADC-C Input 4
CMP10_LP4 I CMPSS-10 Low Comparator Positive Input 4
AIO184 0, 4, 8, 12 I Analog Pin Used For Digital Input 184 This pin also has digital mux functions which are described in the GPIO section of this table.
C5 N5 56 48 I ADC-C Input 5
CMP11_LP4 I CMPSS-11 Low Comparator Positive Input 4
AIO185 0, 4, 8, 12 I Analog Pin Used For Digital Input 185 This pin also has digital mux functions which are described in the GPIO section of this table.
C6 M8 63 I ADC-C Input 6
CMP12_LP4 I CMPSS-12 Low Comparator Positive Input 4
GPIO236 0, 4, 8, 12 I/O General-Purpose Input Output 236 This pin also has digital mux functions which are described in the GPIO section of this table.
C7 M9 64 I ADC-C Input 7
CMP5_HP5 I CMPSS-5 High Comparator Positive Input 5
GPIO237 0, 4, 8, 12 I/O General-Purpose Input Output 237 This pin also has digital mux functions which are described in the GPIO section of this table.
C8 N12 69 58 40 I ADC-C Input 8
CMP12_LP0 I CMPSS-12 Low Comparator Positive Input 0
GPIO238 0, 4, 8, 12 I/O General-Purpose Input Output 238 This pin also has digital mux functions which are described in the GPIO section of this table.
C9 P12 70 59 41 I ADC-C Input 9
CMP9_LP3 I CMPSS-9 Low Comparator Positive Input 3
GPIO239 0, 4, 8, 12 I/O General-Purpose Input Output 239 This pin also has digital mux functions which are described in the GPIO section of this table.
C10 N8 I ADC-C Input 10
CMP8_HP5 I CMPSS-8 High Comparator Positive Input 5
AIO186 0, 4, 8, 12 I Analog Pin Used For Digital Input 186 This pin also has digital mux functions which are described in the GPIO section of this table.
C11 P8 I ADC-C Input 11
CMP11_HP5 I CMPSS-11 High Comparator Positive Input 5
AIO187 0, 4, 8, 12 I Analog Pin Used For Digital Input 187 This pin also has digital mux functions which are described in the GPIO section of this table.
C12 R8 I ADC-C Input 12
CMP12_HP5 I CMPSS-12 High Comparator Positive Input 5
AIO188 0, 4, 8, 12 I Analog Pin Used For Digital Input 188 This pin also has digital mux functions which are described in the GPIO section of this table.
C13 T8 I ADC-C Input 13
CMP5_LP5 I CMPSS-5 Low Comparator Positive Input 5
AIO189 0, 4, 8, 12 I Analog Pin Used For Digital Input 189 This pin also has digital mux functions which are described in the GPIO section of this table.
C16 N7 I ADC-C Input 16
CMP6_LP5 I CMPSS-6 Low Comparator Positive Input 5
AIO190 0, 4, 8, 12 I Analog Pin Used For Digital Input 190 This pin also has digital mux functions which are described in the GPIO section of this table.
C17 P7 I ADC-C Input 17
CMP7_LP5 I CMPSS-7 Low Comparator Positive Input 5
AIO191 0, 4, 8, 12 I Analog Pin Used For Digital Input 191 This pin also has digital mux functions which are described in the GPIO section of this table.
B24 R3 47 39 28 I ADC-B Input 24
D0 I ADC-D Input 0
AIO192 0, 4, 8, 12 I Analog Pin Used For Digital Input 192 This pin also has digital mux functions which are described in the GPIO section of this table.
B25 T3 48 40 29 I ADC-B Input 25
D1 I ADC-D Input 1
AIO193 0, 4, 8, 12 I Analog Pin Used For Digital Input 193 This pin also has digital mux functions which are described in the GPIO section of this table.
B26 R5 57 49 34 I ADC-B Input 26
CMP4_HP3 I CMPSS-4 High Comparator Positive Input 3
CMP4_LP3 I CMPSS-4 Low Comparator Positive Input 3
CMP7_HN0 I CMPSS-7 High Comparator Negative Input 0
CMP7_LN0 I CMPSS-7 Low Comparator Negative Input 0
D2 I ADC-D Input 2
AIO194 0, 4, 8, 12 I Analog Pin Used For Digital Input 194 This pin also has digital mux functions which are described in the GPIO section of this table.
B27 R6 58 50 35 I ADC-B Input 27
D3 I ADC-D Input 3
AIO195 0, 4, 8, 12 I Analog Pin Used For Digital Input 195 This pin also has digital mux functions which are described in the GPIO section of this table.
B28 N10 65 I ADC-B Input 28
CMP5_LP3 I CMPSS-5 Low Comparator Positive Input 3
CMP8_HN0 I CMPSS-8 High Comparator Negative Input 0
CMP8_LN0 I CMPSS-8 Low Comparator Negative Input 0
D4 I ADC-D Input 4
GPIO240 0, 4, 8, 12 I/O General-Purpose Input Output 240 This pin also has digital mux functions which are described in the GPIO section of this table.
B29 N11 66 55 I ADC-B Input 29
CMP4_HN1 I CMPSS-4 High Comparator Negative Input 1
CMP4_HP1 I CMPSS-4 High Comparator Positive Input 1
CMP4_LN1 I CMPSS-4 Low Comparator Negative Input 1
CMP4_LP1 I CMPSS-4 Low Comparator Positive Input 1
D5 I ADC-D Input 5
GPIO241 0, 4, 8, 12 I/O General-Purpose Input Output 241 This pin also has digital mux functions which are described in the GPIO section of this table.
B30 T12 71 60 I ADC-B Input 30
CMP1_HP4 I CMPSS-1 High Comparator Positive Input 4
CMP1_LP4 I CMPSS-1 Low Comparator Positive Input 4
D6 I ADC-D Input 6
GPIO242 0, 4, 8, 12 I/O General-Purpose Input Output 242 This pin also has digital mux functions which are described in the GPIO section of this table.
B31 R12 72 61 I ADC-B Input 31
CMP2_HP4 I CMPSS-2 High Comparator Positive Input 4
CMP2_LP4 I CMPSS-2 Low Comparator Positive Input 4
D7 I ADC-D Input 7
GPIO243 0, 4, 8, 12 I/O General-Purpose Input Output 243 This pin also has digital mux functions which are described in the GPIO section of this table.
C28 R13 75 I ADC-C Input 28
CMP6_HP0 I CMPSS-6 High Comparator Positive Input 0
CMP6_LP0 I CMPSS-6 Low Comparator Positive Input 0
D8 I ADC-D Input 8
GPIO244 0, 4, 8, 12 I/O General-Purpose Input Output 244 This pin also has digital mux functions which are described in the GPIO section of this table.
C29 T13 76 I ADC-C Input 29
CMP3_LP3 I CMPSS-3 Low Comparator Positive Input 3
CMP6_HN0 I CMPSS-6 High Comparator Negative Input 0
CMP6_LN0 I CMPSS-6 Low Comparator Negative Input 0
D9 I ADC-D Input 9
GPIO245 0, 4, 8, 12 I/O General-Purpose Input Output 245 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP8_LP5 N6 I CMPSS-8 Low Comparator Positive Input 5
D10 I ADC-D Input 10
AIO196 0, 4, 8, 12 I Analog Pin Used For Digital Input 196 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP9_LP5 P6 I CMPSS-9 Low Comparator Positive Input 5
D11 I ADC-D Input 11
AIO197 0, 4, 8, 12 I Analog Pin Used For Digital Input 197 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP5_HP0 M7 I CMPSS-5 High Comparator Positive Input 0
CMP5_LP0 I CMPSS-5 Low Comparator Positive Input 0
CMP10_HN1 I CMPSS-10 High Comparator Negative Input 1
CMP10_LN1 I CMPSS-10 Low Comparator Negative Input 1
D12 I ADC-D Input 12
AIO198 0, 4, 8, 12 I Analog Pin Used For Digital Input 198 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP2_HP3 M6 I CMPSS-2 High Comparator Positive Input 3
CMP2_LP3 I CMPSS-2 Low Comparator Positive Input 3
CMP5_HN0 I CMPSS-5 High Comparator Negative Input 0
CMP5_LN0 I CMPSS-5 Low Comparator Negative Input 0
D13 I ADC-D Input 13
AIO199 0, 4, 8, 12 I Analog Pin Used For Digital Input 199 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP10_LP5 R7 I CMPSS-10 Low Comparator Positive Input 5
D16 I ADC-D Input 16
AIO200 0, 4, 8, 12 I Analog Pin Used For Digital Input 200 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP11_LP5 T7 I CMPSS-11 Low Comparator Positive Input 5
D17 I ADC-D Input 17
AIO201 0, 4, 8, 12 I Analog Pin Used For Digital Input 201 This pin also has digital mux functions which are described in the GPIO section of this table.
A24 P3 49 41 30 I ADC-A Input 24
DACB_OUT O Buffered DAC-B Output.
E0 I ADC-E Input 0
AIO202 0, 4, 8, 12 I Analog Pin Used For Digital Input 202 This pin also has digital mux functions which are described in the GPIO section of this table.
A25 P4 50 42 31 I ADC-A Input 25
E1 I ADC-E Input 1
AIO203 0, 4, 8, 12 I Analog Pin Used For Digital Input 203 This pin also has digital mux functions which are described in the GPIO section of this table.
A26 T5 59 51 I ADC-A Input 26
CMP3_HP4 I CMPSS-3 High Comparator Positive Input 4
CMP3_LP4 I CMPSS-3 Low Comparator Positive Input 4
E2 I ADC-E Input 2
AIO204 0, 4, 8, 12 I Analog Pin Used For Digital Input 204 This pin also has digital mux functions which are described in the GPIO section of this table.
A27 T6 60 52 I ADC-A Input 27
CMP4_HP4 I CMPSS-4 High Comparator Positive Input 4
CMP4_LP4 I CMPSS-4 Low Comparator Positive Input 4
E3 I ADC-E Input 3
AIO205 0, 4, 8, 12 I Analog Pin Used For Digital Input 205 This pin also has digital mux functions which are described in the GPIO section of this table.
A28 P11 67 56 38 I ADC-A Input 28
CMP8_HN1 I CMPSS-8 High Comparator Negative Input 1
CMP8_HP1 I CMPSS-8 High Comparator Positive Input 1
CMP8_LN1 I CMPSS-8 Low Comparator Negative Input 1
CMP8_LP1 I CMPSS-8 Low Comparator Positive Input 1
E4 I ADC-E Input 4
GPIO246 0, 4, 8, 12 I/O General-Purpose Input Output 246 This pin also has digital mux functions which are described in the GPIO section of this table.
A29 R11 68 57 39 I ADC-A Input 29
CMP8_HP2 I CMPSS-8 High Comparator Positive Input 2
CMP8_LP2 I CMPSS-8 Low Comparator Positive Input 2
E5 I ADC-E Input 5
GPIO247 0, 4, 8, 12 I/O General-Purpose Input Output 247 This pin also has digital mux functions which are described in the GPIO section of this table.
A30 P13 73 62 I ADC-A Input 30
CMP5_HN1 I CMPSS-5 High Comparator Negative Input 1
CMP5_HP1 I CMPSS-5 High Comparator Positive Input 1
CMP5_LN1 I CMPSS-5 Low Comparator Negative Input 1
CMP5_LP1 I CMPSS-5 Low Comparator Positive Input 1
E6 I ADC-E Input 6
GPIO248 0, 4, 8, 12 I/O General-Purpose Input Output 248 This pin also has digital mux functions which are described in the GPIO section of this table.
A31 N13 74 63 I ADC-A Input 31
CMP5_HP2 I CMPSS-5 High Comparator Positive Input 2
CMP5_LP2 I CMPSS-5 Low Comparator Positive Input 2
E7 I ADC-E Input 7
GPIO249 0, 4, 8, 12 I/O General-Purpose Input Output 249 This pin also has digital mux functions which are described in the GPIO section of this table.
C30 T10 I ADC-C Input 30
CMP2_HP1 I CMPSS-2 High Comparator Positive Input 1
CMP2_LP1 I CMPSS-2 Low Comparator Positive Input 1
CMP10_HN0 I CMPSS-10 High Comparator Negative Input 0
CMP10_LN0 I CMPSS-10 Low Comparator Negative Input 0
E8 I ADC-E Input 8
AIO206 0, 4, 8, 12 I Analog Pin Used For Digital Input 206 This pin also has digital mux functions which are described in the GPIO section of this table.
C31 T9 I ADC-C Input 31
CMP2_HP2 I CMPSS-2 High Comparator Positive Input 2
CMP2_LP2 I CMPSS-2 Low Comparator Positive Input 2
CMP9_HN1 I CMPSS-9 High Comparator Negative Input 1
CMP9_LN1 I CMPSS-9 Low Comparator Negative Input 1
E9 I ADC-E Input 9
AIO207 0, 4, 8, 12 I Analog Pin Used For Digital Input 207 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP10_HP1 R10 I CMPSS-10 High Comparator Positive Input 1
CMP10_LP1 I CMPSS-10 Low Comparator Positive Input 1
E10 I ADC-E Input 10
AIO208 0, 4, 8, 12 I Analog Pin Used For Digital Input 208 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP11_HP1 R9 I CMPSS-11 High Comparator Positive Input 1
CMP11_LP1 I CMPSS-11 Low Comparator Positive Input 1
E11 I ADC-E Input 11
AIO209 0, 4, 8, 12 I Analog Pin Used For Digital Input 209 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP10_HP2 P9 I CMPSS-10 High Comparator Positive Input 2
CMP10_LP2 I CMPSS-10 Low Comparator Positive Input 2
E12 I ADC-E Input 12
AIO210 0, 4, 8, 12 I Analog Pin Used For Digital Input 210 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP11_HP2 N9 I CMPSS-11 High Comparator Positive Input 2
CMP11_LP2 I CMPSS-11 Low Comparator Positive Input 2
E13 I ADC-E Input 13
AIO211 0, 4, 8, 12 I Analog Pin Used For Digital Input 211 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP6_HP2 P10 I CMPSS-6 High Comparator Positive Input 2
CMP6_LP2 I CMPSS-6 Low Comparator Positive Input 2
E16 I ADC-E Input 16
AIO212 0, 4, 8, 12 I Analog Pin Used For Digital Input 212 This pin also has digital mux functions which are described in the GPIO section of this table.
CMP6_HN1 T11 I CMPSS-6 High Comparator Negative Input 1
CMP6_HP1 I CMPSS-6 High Comparator Positive Input 1
CMP6_LN1 I CMPSS-6 Low Comparator Negative Input 1
CMP6_LP1 I CMPSS-6 Low Comparator Positive Input 1
E17 I ADC-E Input 17
AIO213 0, 4, 8, 12 I Analog Pin Used For Digital Input 213 This pin also has digital mux functions which are described in the GPIO section of this table.
VREFHIAB N2 38 30 19 I ADC-AB high reference. This voltage must be driven into the pin from external circuitry. Place at least a 2.2-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHI and VREFLO pins. NOTE: Do not load this pin externally
VREFHICDE R4 54 46 33 I ADC-CDE high reference. This voltage must be driven into the pin from external circuitry. Place at least a 2.2-µF capacitor on this pin for the 12-bit mode, or at least a 22-µF capacitor for the 16-bit mode. This capacitor should be placed as close to the device as possible between the VREFHI and VREFLO pins. NOTE: Do not load this pin externally
VREFLOAB N1 37 29 18 I ADC-AB Low Reference
VREFLOCDE T4 53 45 32 I ADC-CDE Low Reference
GPIO
AIO160 0, 4, 8, 12 R1 44 36 25 I Analog Pin Used For Digital Input 160 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_C2 11 I SDFM-3 Channel 2 Clock Input
AIO161 0, 4, 8, 12 P1 43 35 24 I Analog Pin Used For Digital Input 161 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_D2 11 I SDFM-3 Channel 2 Data Input
AIO162 0, 4, 8, 12 M1 36 28 I Analog Pin Used For Digital Input 162 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_C2 11 I SDFM-2 Channel 2 Clock Input
AIO163 0, 4, 8, 12 M2 35 27 I Analog Pin Used For Digital Input 163 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_D2 11 I SDFM-2 Channel 2 Data Input
AIO164 0, 4, 8, 12 L2 32 24 I Analog Pin Used For Digital Input 164 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_C3 11 I SDFM-2 Channel 3 Clock Input
AIO165 0, 4, 8, 12 L1 31 23 I Analog Pin Used For Digital Input 165 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_D3 11 I SDFM-2 Channel 3 Data Input
GPIO224 0, 4, 8, 12 L5 26 18 13 I/O General-Purpose Input Output 224 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM12_A 1 O ePWM-12 Output A
EPWM12_B 2 O ePWM-12 Output B
SPIB_POCI 5 I/O SPI-B Peripheral Out, Controller In (POCI)
MCAND_RX 6 I MCAN-D Receive
OUTPUTXBAR5 9 O Output X-BAR Output 5
SD4_D2 11 I SDFM-4 Channel 2 Data Input
ADCA_EXTMUXSEL0 14 O External ADC selection Mux output
ESC_GPO8 15 O EtherCAT General-Purpose Output 8
GPIO225 0, 4, 8, 12 K5 25 17 12 I/O General-Purpose Input Output 225 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM11_B 1 O ePWM-11 Output B
SPIB_PICO 5 I/O SPI-B Peripheral In, Controller Out (PICO)
I2CB_SDA 6 I/OD I2C-B Open-Drain Bidirectional Data
UARTF_TX 7 I/O UART-F Serial Data Transmit
OUTPUTXBAR4 9 O Output X-BAR Output 4
SD4_C1 11 I SDFM-4 Channel 1 Clock Input
ADCA_EXTMUXSEL1 14 O External ADC selection Mux output
ESC_GPO9 15 O EtherCAT General-Purpose Output 9
GPIO226 0, 4, 8, 12 H4 22 16 I/O General-Purpose Input Output 226 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM10_A 1 O ePWM-10 Output A
SPIA_PTE 5 I/O SPI-A Peripheral Transmit Enable (PTE)
MCAND_TX 6 O MCAN-D Transmit
UARTF_RX 7 I/O UART-F Serial Data Receive
OUTPUTXBAR1 9 O Output X-BAR Output 1
SD1_C3 10 I SDFM-1 Channel 3 Clock Input
SD1_D3 11 I SDFM-1 Channel 3 Data Input
ADCA_EXTMUXSEL2 14 O External ADC selection Mux output
ESC_GPO10 15 O EtherCAT General-Purpose Output 10
GPIO227 0, 4, 8, 12 H3 21 I/O General-Purpose Input Output 227 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM14_B 1 O ePWM-14 Output B
SPIA_CLK 5 I/O SPI-A Clock
OUTPUTXBAR4 9 O Output X-BAR Output 4
SD2_C2 11 I SDFM-2 Channel 2 Clock Input
ADCA_EXTMUXSEL3 14 O External ADC selection Mux output
GPIO228 0, 4, 8, 12 G3 18 I/O General-Purpose Input Output 228 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM18_A 1 O ePWM-18 Output A
EPWM13_A 2 O ePWM-13 Output A
SPIB_POCI 5 I/O SPI-B Peripheral Out, Controller In (POCI)
LINB_TX 6 O LIN-B Transmit
OUTPUTXBAR1 9 O Output X-BAR Output 1
SENT4 10 I/O SENT Input Pin 4
SD2_D1 11 I SDFM-2 Channel 1 Data Input
GPIO229 0, 4, 8, 12 G4 17 I/O General-Purpose Input Output 229 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM17_B 1 O ePWM-17 Output B
EPWM12_B 2 O ePWM-12 Output B
SPIB_PICO 5 I/O SPI-B Peripheral In, Controller Out (PICO)
MCANA_RX 6 I MCAN-A Receive
SENT3 10 I/O SENT Input Pin 3
SD1_C4 11 I SDFM-1 Channel 4 Clock Input
AIO166 0, 4, 8, 12 K2 I Analog Pin Used For Digital Input 166 This pin also has analog functions which are described in the ANALOG section of this table.
SD4_C1 11 I SDFM-4 Channel 1 Clock Input
AIO167 0, 4, 8, 12 K1 I Analog Pin Used For Digital Input 167 This pin also has analog functions which are described in the ANALOG section of this table.
SD4_D1 11 I SDFM-4 Channel 1 Data Input
AIO168 0, 4, 8, 12 M3 40 32 21 I Analog Pin Used For Digital Input 168 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_C3 11 I SDFM-3 Channel 3 Clock Input
AIO169 0, 4, 8, 12 M4 39 31 20 I Analog Pin Used For Digital Input 169 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_D3 11 I SDFM-3 Channel 3 Data Input
AIO170 0, 4, 8, 12 P2 42 34 23 I Analog Pin Used For Digital Input 170 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_C4 11 I SDFM-3 Channel 4 Clock Input
AIO171 0, 4, 8, 12 N3 41 33 22 I Analog Pin Used For Digital Input 171 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_D4 11 I SDFM-3 Channel 4 Data Input
AIO172 0, 4, 8, 12 L4 34 26 17 I Analog Pin Used For Digital Input 172 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_C1 11 I SDFM-1 Channel 1 Clock Input
AIO173 0, 4, 8, 12 L3 33 25 16 I Analog Pin Used For Digital Input 173 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_D1 11 I SDFM-1 Channel 1 Data Input
AIO174 0, 4, 8, 12 K4 30 22 I Analog Pin Used For Digital Input 174 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_C4 11 I SDFM-2 Channel 4 Clock Input
AIO175 0, 4, 8, 12 K3 29 21 I Analog Pin Used For Digital Input 175 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_D4 11 I SDFM-2 Channel 4 Data Input
GPIO230 0, 4, 8, 12 J5 24 I/O General-Purpose Input Output 230 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM11_A 1 O ePWM-11 Output A
SYNCOUT 3 O External ePWM Synchronization Pulse
I2CB_SCL 6 I/OD I2C-B Open-Drain Bidirectional Clock
OUTPUTXBAR3 9 O Output X-BAR Output 3
SD4_D1 11 I SDFM-4 Channel 1 Data Input
ADCB_EXTMUXSEL0 14 O External ADC selection Mux output
GPIO231 0, 4, 8, 12 H5 23 I/O General-Purpose Input Output 231 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM10_B 1 O ePWM-10 Output B
SPIA_PICO 5 I/O SPI-A Peripheral In, Controller Out (PICO)
MCAND_RX 6 I MCAN-D Receive
OUTPUTXBAR2 9 O Output X-BAR Output 2
SD1_C3 11 I SDFM-1 Channel 3 Clock Input
ADCB_EXTMUXSEL1 14 O External ADC selection Mux output
GPIO232 0, 4, 8, 12 H2 20 15 11 I/O General-Purpose Input Output 232 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM14_A 1 O ePWM-14 Output A
EPWM8_B 2 O ePWM-8 Output B
SPIA_POCI 5 I/O SPI-A Peripheral Out, Controller In (POCI)
OUTPUTXBAR3 9 O Output X-BAR Output 3
SENT6 10 I/O SENT Input Pin 6
SD3_D1 11 I SDFM-3 Channel 1 Data Input
ESC_PHY0_LINKSTATUS 13 I EtherCAT PHY-0 Link Status
ADCB_EXTMUXSEL2 14 O External ADC selection Mux output
ESC_GPO11 15 O EtherCAT General-Purpose Output 11
GPIO233 0, 4, 8, 12 H1 19 14 10 I/O General-Purpose Input Output 233 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM18_B 1 O ePWM-18 Output B
EPWM13_B 2 O ePWM-13 Output B
LINB_RX 6 I LIN-B Receive
OUTPUTXBAR2 9 O Output X-BAR Output 2
SENT5 10 I/O SENT Input Pin 5
SD2_C1 11 I SDFM-2 Channel 1 Clock Input
ESC_PHY1_LINKSTATUS 13 I EtherCAT PHY-1 Link Status
ADCB_EXTMUXSEL3 14 O External ADC selection Mux output
ESC_GPO12 15 O EtherCAT General-Purpose Output 12
GPIO234 0, 4, 8, 12 G2 16 13 I/O General-Purpose Input Output 234 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM17_A 1 O ePWM-17 Output A
EPWM12_A 2 O ePWM-12 Output A
SPIB_PTE 5 I/O SPI-B Peripheral Transmit Enable (PTE)
MCANA_TX 6 O MCAN-A Transmit
SENT2 10 I/O SENT Input Pin 2
SD1_D4 11 I SDFM-1 Channel 4 Data Input
ESC_GPO13 15 O EtherCAT General-Purpose Output 13
GPIO235 0, 4, 8, 12 G1 15 12 I/O General-Purpose Input Output 235 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM9_B 1 O ePWM-9 Output B
SPIB_CLK 5 I/O SPI-B Clock
MCANA_RX 6 I MCAN-A Receive
SENT1 10 I/O SENT Input Pin 1
SD1_C1 11 I SDFM-1 Channel 1 Clock Input
ESC_GPO14 15 O EtherCAT General-Purpose Output 14
AIO176 0, 4, 8, 12 J2 I Analog Pin Used For Digital Input 176 This pin also has analog functions which are described in the ANALOG section of this table.
SD4_C2 11 I SDFM-4 Channel 2 Clock Input
AIO177 0, 4, 8, 12 J1 I Analog Pin Used For Digital Input 177 This pin also has analog functions which are described in the ANALOG section of this table.
SD4_D2 11 I SDFM-4 Channel 2 Data Input
AIO178 0, 4, 8, 12 J4 I Analog Pin Used For Digital Input 178 This pin also has analog functions which are described in the ANALOG section of this table.
SD4_C3 11 I SDFM-4 Channel 3 Clock Input
AIO179 0, 4, 8, 12 J3 I Analog Pin Used For Digital Input 179 This pin also has analog functions which are described in the ANALOG section of this table.
SD4_D3 11 I SDFM-4 Channel 3 Data Input
AIO180 0, 4, 8, 12 R2 45 37 26 I Analog Pin Used For Digital Input 180 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_C2 11 I SDFM-1 Channel 2 Clock Input
AIO181 0, 4, 8, 12 T2 46 38 27 I Analog Pin Used For Digital Input 181 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_D2 11 I SDFM-1 Channel 2 Data Input
AIO182 0, 4, 8, 12 N4 51 43 I Analog Pin Used For Digital Input 182 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_C1 11 I SDFM-3 Channel 1 Clock Input
AIO183 0, 4, 8, 12 M5 52 44 I Analog Pin Used For Digital Input 183 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_D1 11 I SDFM-3 Channel 1 Data Input
AIO184 0, 4, 8, 12 P5 55 47 I Analog Pin Used For Digital Input 184 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_C2 11 I SDFM-3 Channel 2 Clock Input
AIO185 0, 4, 8, 12 N5 56 48 I Analog Pin Used For Digital Input 185 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_D2 11 I SDFM-3 Channel 2 Data Input
GPIO236 0, 4, 8, 12 M8 63 I/O General-Purpose Input Output 236 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM12_B 1 O ePWM-12 Output B
EPWM8_A 2 O ePWM-8 Output A
LINA_RX 6 I LIN-A Receive
OUTPUTXBAR6 9 O Output X-BAR Output 6
SD4_C2 11 I SDFM-4 Channel 2 Clock Input
ESC_I2C_SDA 13 I/OC EtherCAT I2C Data
ADCC_EXTMUXSEL0 14 O External ADC selection Mux output
GPIO237 0, 4, 8, 12 M9 64 I/O General-Purpose Input Output 237 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM14_A 1 O ePWM-14 Output A
EPWM8_B 2 O ePWM-8 Output B
EPWM17_B 3 O ePWM-17 Output B
LINA_TX 6 O LIN-A Transmit
I2CA_SDA 7 I/OD I2C-A Open-Drain Bidirectional Data
OUTPUTXBAR7 9 O Output X-BAR Output 7
SD4_D3 11 I SDFM-4 Channel 3 Data Input
ESC_I2C_SCL 13 I/OC EtherCAT I2C Clock
ADCC_EXTMUXSEL1 14 O External ADC selection Mux output
GPIO238 0, 4, 8, 12 N12 69 58 40 I/O General-Purpose Input Output 238 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM15_B 1 O ePWM-15 Output B
OUTPUTXBAR6 9 O Output X-BAR Output 6
SD1_D3 10 I SDFM-1 Channel 3 Data Input
SD2_C3 11 I SDFM-2 Channel 3 Clock Input
ESC_SYNC0 13 O EtherCAT SyncSignal Output 0
ADCC_EXTMUXSEL2 14 O External ADC selection Mux output
ESC_GPO15 15 O EtherCAT General-Purpose Output 15
GPIO239 0, 4, 8, 12 P12 70 59 41 I/O General-Purpose Input Output 239 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM16_B 1 O ePWM-16 Output B
LINB_TX 6 O LIN-B Transmit
I2CA_SCL 7 I/OD I2C-A Open-Drain Bidirectional Clock
OUTPUTXBAR8 9 O Output X-BAR Output 8
SD2_C4 11 I SDFM-2 Channel 4 Clock Input
ESC_SYNC1 13 O EtherCAT SyncSignal Output 1
ADCC_EXTMUXSEL3 14 O External ADC selection Mux output
ESC_GPO16 15 O EtherCAT General-Purpose Output 16
AIO186 0, 4, 8, 12 N8 I Analog Pin Used For Digital Input 186 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_C1 11 I SDFM-1 Channel 1 Clock Input
AIO187 0, 4, 8, 12 P8 I Analog Pin Used For Digital Input 187 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_D1 11 I SDFM-1 Channel 1 Data Input
AIO188 0, 4, 8, 12 R8 I Analog Pin Used For Digital Input 188 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_C2 11 I SDFM-1 Channel 2 Clock Input
AIO189 0, 4, 8, 12 T8 I Analog Pin Used For Digital Input 189 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_D2 11 I SDFM-1 Channel 2 Data Input
AIO190 0, 4, 8, 12 N7 I Analog Pin Used For Digital Input 190 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_C3 11 I SDFM-1 Channel 3 Clock Input
AIO191 0, 4, 8, 12 P7 I Analog Pin Used For Digital Input 191 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_D3 11 I SDFM-1 Channel 3 Data Input
AIO192 0, 4, 8, 12 R3 47 39 28 I Analog Pin Used For Digital Input 192 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_C3 11 I SDFM-1 Channel 3 Clock Input
AIO193 0, 4, 8, 12 T3 48 40 29 I Analog Pin Used For Digital Input 193 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_D3 11 I SDFM-1 Channel 3 Data Input
AIO194 0, 4, 8, 12 R5 57 49 34 I Analog Pin Used For Digital Input 194 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_C4 11 I SDFM-1 Channel 4 Clock Input
AIO195 0, 4, 8, 12 R6 58 50 35 I Analog Pin Used For Digital Input 195 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_D4 11 I SDFM-1 Channel 4 Data Input
GPIO240 0, 4, 8, 12 N10 65 I/O General-Purpose Input Output 240 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM14_B 1 O ePWM-14 Output B
SPID_PICO 5 I/O SPI-D Peripheral In, Controller Out (PICO)
SD4_C3 11 I SDFM-4 Channel 3 Clock Input
ESC_LED_RUN 13 O
ADCD_EXTMUXSEL0 14 O External ADC selection Mux output
GPIO241 0, 4, 8, 12 N11 66 55 I/O General-Purpose Input Output 241 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM8_A 1 O ePWM-8 Output A
SPID_CLK 5 I/O SPI-D Clock
SD4_D4 11 I SDFM-4 Channel 4 Data Input
ESC_LED_ERR 13 O
ADCD_EXTMUXSEL1 14 O External ADC selection Mux output
ESC_GPO17 15 O EtherCAT General-Purpose Output 17
GPIO242 0, 4, 8, 12 T12 71 60 I/O General-Purpose Input Output 242 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_D4 6 I SDFM-1 Channel 4 Data Input
I2CA_SDA 7 I/OD I2C-A Open-Drain Bidirectional Data
OUTPUTXBAR9 9 O Output X-BAR Output 9
SENT1 10 I/O SENT Input Pin 1
SD2_D2 11 I SDFM-2 Channel 2 Data Input
ESC_LED_STATE_RUN 13 O
ADCD_EXTMUXSEL2 14 O External ADC selection Mux output
ESC_GPO18 15 O EtherCAT General-Purpose Output 18
GPIO243 0, 4, 8, 12 R12 72 61 I/O General-Purpose Input Output 243 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM8_B 1 O ePWM-8 Output B
SENT2 10 I/O SENT Input Pin 2
SD2_D4 11 I SDFM-2 Channel 4 Data Input
ESC_LED_LINK0_ACTIVE 13 O EtherCAT Link-0 Active
ADCD_EXTMUXSEL3 14 O External ADC selection Mux output
ESC_GPO19 15 O EtherCAT General-Purpose Output 19
GPIO244 0, 4, 8, 12 R13 75 I/O General-Purpose Input Output 244 This pin also has analog functions which are described in the ANALOG section of this table.
SPIC_PTE 5 I/O SPI-C Peripheral Transmit Enable (PTE)
SENT5 10 I/O SENT Input Pin 5
SD4_C4 11 I SDFM-4 Channel 4 Clock Input
ESC_LED_LINK1_ACTIVE 13 O EtherCAT Link-1 Active
GPIO245 0, 4, 8, 12 T13 76 I/O General-Purpose Input Output 245 This pin also has analog functions which are described in the ANALOG section of this table.
SPIC_POCI 5 I/O SPI-C Peripheral Out, Controller In (POCI)
SENT6 10 I/O SENT Input Pin 6
SD3_C1 11 I SDFM-3 Channel 1 Clock Input
ESC_PHY_RESETn 13 O EtherCAT PHY Active Low Reset
AIO196 0, 4, 8, 12 N6 I Analog Pin Used For Digital Input 196 This pin also has analog functions which are described in the ANALOG section of this table.
SD4_C4 11 I SDFM-4 Channel 4 Clock Input
AIO197 0, 4, 8, 12 P6 I Analog Pin Used For Digital Input 197 This pin also has analog functions which are described in the ANALOG section of this table.
SD4_D4 11 I SDFM-4 Channel 4 Data Input
AIO198 0, 4, 8, 12 M7 I Analog Pin Used For Digital Input 198 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_C4 11 I SDFM-1 Channel 4 Clock Input
AIO199 0, 4, 8, 12 M6 I Analog Pin Used For Digital Input 199 This pin also has analog functions which are described in the ANALOG section of this table.
SD1_D4 11 I SDFM-1 Channel 4 Data Input
AIO200 0, 4, 8, 12 R7 I Analog Pin Used For Digital Input 200 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_C1 11 I SDFM-2 Channel 1 Clock Input
AIO201 0, 4, 8, 12 T7 I Analog Pin Used For Digital Input 201 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_D1 11 I SDFM-2 Channel 1 Data Input
AIO202 0, 4, 8, 12 P3 49 41 30 I Analog Pin Used For Digital Input 202 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_C1 11 I SDFM-2 Channel 1 Clock Input
AIO203 0, 4, 8, 12 P4 50 42 31 I Analog Pin Used For Digital Input 203 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_D1 11 I SDFM-2 Channel 1 Data Input
AIO204 0, 4, 8, 12 T5 59 51 I Analog Pin Used For Digital Input 204 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_C3 11 I SDFM-3 Channel 3 Clock Input
AIO205 0, 4, 8, 12 T6 60 52 I Analog Pin Used For Digital Input 205 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_D3 11 I SDFM-3 Channel 3 Data Input
GPIO246 0, 4, 8, 12 P11 67 56 38 I/O General-Purpose Input Output 246 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM16_A 1 O ePWM-16 Output A
SPID_PTE 5 I/O SPI-D Peripheral Transmit Enable (PTE)
MCANC_RX 6 I MCAN-C Receive
OUTPUTXBAR7 9 O Output X-BAR Output 7
SD1_D1 11 I SDFM-1 Channel 1 Data Input
ADCE_EXTMUXSEL0 14 O External ADC selection Mux output
ESC_GPO20 15 O EtherCAT General-Purpose Output 20
GPIO247 0, 4, 8, 12 R11 68 57 39 I/O General-Purpose Input Output 247 This pin also has analog functions which are described in the ANALOG section of this table.
EPWM15_A 1 O ePWM-15 Output A
ERRORSTS 2 O Error Status Output. This signal requires an external pulldown.
SPID_POCI 5 I/O SPI-D Peripheral Out, Controller In (POCI)
MCANC_RX 6 I MCAN-C Receive
LINA_TX 7 O LIN-A Transmit
OUTPUTXBAR5 9 O Output X-BAR Output 5
SD2_D3 11 I SDFM-2 Channel 3 Data Input
ADCE_EXTMUXSEL1 14 O External ADC selection Mux output
ESC_GPO21 15 O EtherCAT General-Purpose Output 21
GPIO248 0, 4, 8, 12 P13 73 62 I/O General-Purpose Input Output 248 This pin also has analog functions which are described in the ANALOG section of this table.
EMIF1_SDCKE 2 O External memory interface 1 SDRAM clock enable
SPIC_PICO 5 I/O SPI-C Peripheral In, Controller Out (PICO)
SENT3 10 I/O SENT Input Pin 3
SD1_C2 11 I SDFM-1 Channel 2 Clock Input
ESC_LED_RUN 13 O
ADCE_EXTMUXSEL2 14 O External ADC selection Mux output
ESC_GPO22 15 O EtherCAT General-Purpose Output 22
GPIO249 0, 4, 8, 12 N13 74 63 I/O General-Purpose Input Output 249 This pin also has analog functions which are described in the ANALOG section of this table.
SPIC_CLK 5 I/O SPI-C Clock
SENT4 10 I/O SENT Input Pin 4
SD1_D2 11 I SDFM-1 Channel 2 Data Input
ESC_PHY0_LINKSTATUS 13 I EtherCAT PHY-0 Link Status
ADCE_EXTMUXSEL3 14 O External ADC selection Mux output
ESC_GPO23 15 O EtherCAT General-Purpose Output 23
AIO206 0, 4, 8, 12 T10 I Analog Pin Used For Digital Input 206 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_C4 11 I SDFM-3 Channel 4 Clock Input
AIO207 0, 4, 8, 12 T9 I Analog Pin Used For Digital Input 207 This pin also has analog functions which are described in the ANALOG section of this table.
SD3_D4 11 I SDFM-3 Channel 4 Data Input
AIO208 0, 4, 8, 12 R10 I Analog Pin Used For Digital Input 208 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_C2 11 I SDFM-2 Channel 2 Clock Input
AIO209 0, 4, 8, 12 R9 I Analog Pin Used For Digital Input 209 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_D2 11 I SDFM-2 Channel 2 Data Input
AIO210 0, 4, 8, 12 P9 I Analog Pin Used For Digital Input 210 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_C3 11 I SDFM-2 Channel 3 Clock Input
AIO211 0, 4, 8, 12 N9 I Analog Pin Used For Digital Input 211 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_D3 11 I SDFM-2 Channel 3 Data Input
AIO212 0, 4, 8, 12 P10 I Analog Pin Used For Digital Input 212 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_C4 11 I SDFM-2 Channel 4 Clock Input
AIO213 0, 4, 8, 12 T11 I Analog Pin Used For Digital Input 213 This pin also has analog functions which are described in the ANALOG section of this table.
SD2_D4 11 I SDFM-2 Channel 4 Data Input
GPIO0 0, 4, 8, 12 A8 160 128 88 I/O General-Purpose Input Output 0
EPWM1_A 1 O ePWM-1 Output A
EMIF1_A13 2 O External memory interface 1 address line 13
EMIF1_D0 3 I/O External memory interface 1 data line 0
MCAND_TX 5 O MCAN-D Transmit
I2CA_SDA 6 I/OD I2C-A Open-Drain Bidirectional Data
UARTE_TX 7 I/O UART-E Serial Data Transmit
OUTPUTXBAR9 9 O Output X-BAR Output 9
ESC_TX0_DATA0 10 O EtherCAT MII Transmit-0 Data-0
ESC_GPI0 11 I EtherCAT General-Purpose Input 0
FSITXA_D0 13 O FSITX-A Primary Data Output
GPIO1 0, 4, 8, 12 A7 161 129 89 I/O General-Purpose Input Output 1
EPWM1_B 1 O ePWM-1 Output B
EMIF1_A14 2 O External memory interface 1 address line 14
EMIF1_D3 3 I/O External memory interface 1 data line 3
MCAND_RX 5 I MCAN-D Receive
I2CA_SCL 6 I/OD I2C-A Open-Drain Bidirectional Clock
UARTE_RX 7 I/O UART-E Serial Data Receive
OUTPUTXBAR10 9 O Output X-BAR Output 10
ESC_TX1_DATA0 10 O EtherCAT MII Transmit-1 Data-0
ESC_GPI1 11 I EtherCAT General-Purpose Input 1
FSITXA_D1 13 O FSITX-A Optional Additional Data Output
GPIO2 0, 4, 8, 12 B7 162 130 90 I/O General-Purpose Input Output 2
EPWM2_A 1 O ePWM-2 Output A
EMIF1_A15 2 O External memory interface 1 address line 15
EMIF1_D4 3 I/O External memory interface 1 data line 4
UARTA_TX 5 I/O UART-A Serial Data Transmit
I2CB_SDA 6 I/OD I2C-B Open-Drain Bidirectional Data
MCANF_TX 7 O MCAN-F Transmit
OUTPUTXBAR1 9 O Output X-BAR Output 1
ESC_RX1_ERR 10 I EtherCAT MII Receive-1 Error
ESC_GPI2 11 I EtherCAT General-Purpose Input 2
FSITXA_CLK 13 O FSITX-A Output Clock
GPIO3 0, 4, 8, 12 C7 163 131 91 I/O General-Purpose Input Output 3
EPWM2_B 1 O ePWM-2 Output B
EMIF1_A16 2 O External memory interface 1 address line 16
EMIF1_D5 3 I/O External memory interface 1 data line 5
UARTA_RX 5 I/O UART-A Serial Data Receive
I2CB_SCL 6 I/OD I2C-B Open-Drain Bidirectional Clock
MCANF_RX 7 I MCAN-F Receive
OUTPUTXBAR2 9 O Output X-BAR Output 2
ESC_GPI3 11 I EtherCAT General-Purpose Input 3
FSIRXA_D0 13 I FSIRX-A Primary Data Input
GPIO4 0, 4, 8, 12 D7 164 132 92 I/O General-Purpose Input Output 4
EPWM3_A 1 O ePWM-3 Output A
EMIF1_A17 2 O External memory interface 1 address line 17
EMIF1_D9 3 I/O External memory interface 1 data line 9
MCANC_TX 5 O MCAN-C Transmit
UARTF_TX 7 I/O UART-F Serial Data Transmit
OUTPUTXBAR3 9 O Output X-BAR Output 3
ESC_GPI4 11 I EtherCAT General-Purpose Input 4
FSIRXA_D1 13 I FSIRX-A Optional Additional Data Input
ERRORSTS 15 O Error Status Output. This signal requires an external pulldown.
GPIO5 0, 4, 8, 12 A6 165 133 93 I/O General-Purpose Input Output 5
EPWM3_B 1 O ePWM-3 Output B
EMIF1_A18 2 O External memory interface 1 address line 18
EMIF1_D10 3 I/O External memory interface 1 data line 10
MCANC_RX 5 I MCAN-C Receive
UARTF_RX 7 I/O UART-F Serial Data Receive
OUTPUTXBAR11 9 O Output X-BAR Output 11
OUTPUTXBAR3 10 O Output X-BAR Output 3
ESC_GPI5 11 I EtherCAT General-Purpose Input 5
FSIRXA_CLK 13 I FSIRX-A Input Clock
GPIO6 0, 4, 8, 12 B6 166 134 94 I/O General-Purpose Input Output 6
EPWM4_A 1 O ePWM-4 Output A
EMIF1_DQM0 2 O External memory interface 1 Input/output mask for byte 0
EMIF1_CLK 3 O External memory interface 1 clock
MCANB_TX 5 O MCAN-B Transmit
LINA_TX 6 O LIN-A Transmit
OUTPUTXBAR4 9 O Output X-BAR Output 4
SYNCOUT 10 O External ePWM Synchronization Pulse
ESC_GPI6 11 I EtherCAT General-Purpose Input 6
FSITXB_D0 13 O FSITX-B Primary Data Output
GPIO7 0, 4, 8, 12 C6 167 135 I/O General-Purpose Input Output 7
EPWM4_B 1 O ePWM-4 Output B
EMIF1_DQM1 2 O External memory interface 1 Input/output mask for byte 1
EMIF1_CAS 3 O External memory interface 1 column address strobe
MCANB_RX 5 I MCAN-B Receive
LINA_RX 6 I LIN-A Receive
OUTPUTXBAR5 9 O Output X-BAR Output 5
ESC_GPI7 11 I EtherCAT General-Purpose Input 7
FSITXB_D1 13 O FSITX-B Optional Additional Data Output
GPIO8 0, 4, 8, 12 D6 170 138 96 I/O General-Purpose Input Output 8
EPWM5_A 1 O ePWM-5 Output A
EMIF1_RAS 2 O External memory interface 1 row address strobe
EPWM4_B 3 O ePWM-4 Output B
MCANC_TX 5 O MCAN-C Transmit
SPIE_PICO 6 I/O SPI-E Peripheral In, Controller Out (PICO)
UARTD_TX 7 I/O UART-D Serial Data Transmit
OUTPUTXBAR12 9 O Output X-BAR Output 12
ADCSOCAO 10 O ADC Start of Conversion A Output for External ADC (from ePWM modules)
ESC_GPO0 11 O EtherCAT General-Purpose Output 0
FSITXB_CLK 13 O FSITX-B Output Clock
FSITXA_D1 14 O FSITX-A Optional Additional Data Output
FSIRXA_D0 15 I FSIRX-A Primary Data Input
GPIO9 0, 4, 8, 12 A5 171 139 97 I/O General-Purpose Input Output 9
EPWM5_B 1 O ePWM-5 Output B
EMIF1_D11 2 I/O External memory interface 1 data line 11
SPIE_POCI 6 I/O SPI-E Peripheral Out, Controller In (POCI)
UARTD_RX 7 I/O UART-D Serial Data Receive
OUTPUTXBAR6 9 O Output X-BAR Output 6
ESC_TX0_CLK 10 I EtherCAT MII Transmit-0 Clock
ESC_GPO1 11 O EtherCAT General-Purpose Output 1
FSIRXB_D0 13 I FSIRX-B Primary Data Input
FSITXA_D0 14 O FSITX-A Primary Data Output
FSIRXA_CLK 15 I FSIRX-A Input Clock
GPIO10 0, 4, 8, 12 C5 172 140 98 I/O General-Purpose Input Output 10
EPWM8_A 1 O ePWM-8 Output A
PMBUSA_SCL 2 I/OD PMBus-A Open-Drain Bidirectional Clock
ADCSOCBO 3 O ADC Start of Conversion B Output for External ADC (from ePWM modules)
MCANC_RX 5 I MCAN-C Receive
UARTC_TX 6 I/O UART-C Serial Data Transmit
I2CA_SCL 7 I/OD I2C-A Open-Drain Bidirectional Clock
SENT2 9 I/O SENT Input Pin 2
ESC_GPI19 13 I EtherCAT General-Purpose Input 19
ADCA_EXTMUXSEL2 14 O External ADC selection Mux output
OUTPUTXBAR13 15 O Output X-BAR Output 13
GPIO11 0, 4, 8, 12 A4 173 141 99 I/O General-Purpose Input Output 11
EPWM6_B 1 O ePWM-6 Output B
EMIF1_D15 2 I/O External memory interface 1 data line 15
EPWM7_B 3 O ePWM-7 Output B
SPIE_PTE 6 I/O SPI-E Peripheral Transmit Enable (PTE)
SD4_D1 7 I SDFM-4 Channel 1 Data Input
PMBUSA_ALERT 9 I/OD PMBus-A Open-Drain Bidirectional Alert Signal
ESC_TX0_DATA1 10 O EtherCAT MII Transmit-0 Data-1
ESC_GPO3 11 O EtherCAT General-Purpose Output 3
FSIRXB_CLK 13 I FSIRX-B Input Clock
FSIRXA_D1 14 I FSIRX-A Optional Additional Data Input
OUTPUTXBAR7 15 O Output X-BAR Output 7
GPIO12 0, 4, 8, 12 A3 174 142 100 I/O General-Purpose Input Output 12
EPWM7_A 1 O ePWM-7 Output A
EMIF1_A1 2 O External memory interface 1 address line 1
ADCSOCAO 3 O ADC Start of Conversion A Output for External ADC (from ePWM modules)
SPIE_CLK 6 I/O SPI-E Clock
SD4_C2 7 I SDFM-4 Channel 2 Clock Input
PMBUSA_CTL 9 I/O PMBus-A Control Signal - Target Input/Controller Output
ESC_TX0_DATA2 10 O EtherCAT MII Transmit-0 Data-2
ESC_GPO4 11 O EtherCAT General-Purpose Output 4
FSIRXC_D0 13 I FSIRX-C Primary Data Input
FSIRXA_D0 14 I FSIRX-A Primary Data Input
OUTPUTXBAR14 15 O Output X-BAR Output 14
GPIO13 0, 4, 8, 12 A2 175 143 I/O General-Purpose Input Output 13
EPWM7_B 1 O ePWM-7 Output B
EMIF1_CS0n 2 O External memory interface 1 chip select 0
EMIF1_D9 3 I/O External memory interface 1 data line 9
UARTC_RX 6 I/O UART-C Serial Data Receive
SD4_D2 7 I SDFM-4 Channel 2 Data Input
PMBUSA_SDA 9 I/OD PMBus-A Open-Drain Bidirectional Data
ESC_TX0_DATA3 10 O EtherCAT MII Transmit-0 Data-3
ESC_GPO5 11 O EtherCAT General-Purpose Output 5
FSIRXC_D1 13 I FSIRX-C Optional Additional Data Input
FSIRXA_CLK 14 I FSIRX-A Input Clock
OUTPUTXBAR15 15 O Output X-BAR Output 15
GPIO14 0, 4, 8, 12 B3 176 144 I/O General-Purpose Input Output 14
EPWM6_A 1 O ePWM-6 Output A
EMIF1_D17 2 I/O External memory interface 1 data line 17
EPWM18_A 3 O ePWM-18 Output A
EMIF1_D13 5 I/O External memory interface 1 data line 13
LINA_TX 6 O LIN-A Transmit
OUTPUTXBAR3 7 O Output X-BAR Output 3
PMBUSA_SCL 9 I/OD PMBus-A Open-Drain Bidirectional Clock
ESC_PHY1_LINKSTATUS 10 I EtherCAT PHY-1 Link Status
ESC_GPO6 11 O EtherCAT General-Purpose Output 6
FSIRXC_CLK 13 I FSIRX-C Input Clock
SD4_C1 14 I SDFM-4 Channel 1 Clock Input
OUTPUTXBAR8 15 O Output X-BAR Output 8
GPIO15 0, 4, 8, 12 C4 1 1 1 I/O General-Purpose Input Output 15
EPWM8_B 1 O ePWM-8 Output B
PMBUSA_CTL 3 I/O PMBus-A Control Signal - Target Input/Controller Output
I2CA_SDA 5 I/OD I2C-A Open-Drain Bidirectional Data
LINA_RX 6 I LIN-A Receive
OUTPUTXBAR4 7 O Output X-BAR Output 4
SENT1 9 I/O SENT Input Pin 1
ESC_GPO7 10 O EtherCAT General-Purpose Output 7
ESC_GPI20 13 I EtherCAT General-Purpose Input 20
ADCA_EXTMUXSEL3 14 O External ADC selection Mux output
OUTPUTXBAR16 15 O Output X-BAR Output 16
GPIO16 0, 4, 8, 12 D5 2 2 2 I/O General-Purpose Input Output 16
EPWM9_A 1 O ePWM-9 Output A
EMIF1_D29 2 I/O External memory interface 1 data line 29
EMIF1_BA0 3 O External memory interface 1 bank address 0
SPIA_PICO 5 I/O SPI-A Peripheral In, Controller Out (PICO)
MCAND_TX 7 O MCAN-D Transmit
ESC_RX1_CLK 10 I EtherCAT MII Receive-1 Clock
SD1_D1 11 I SDFM-1 Channel 1 Data Input
FSIRXD_D1 13 I FSIRX-D Optional Additional Data Input
FSIRXC_CLK 14 I FSIRX-C Input Clock
OUTPUTXBAR7 15 O Output X-BAR Output 7
GPIO17 0, 4, 8, 12 B2 4 4 4 I/O General-Purpose Input Output 17
EPWM9_B 1 O ePWM-9 Output B
EMIF1_DQM3 2 O External memory interface 1 Input/output mask for byte 3
EMIF1_BA1 3 O External memory interface 1 bank address 1
SPIA_POCI 5 I/O SPI-A Peripheral Out, Controller In (POCI)
MCAND_RX 7 I MCAN-D Receive
ESC_RX1_DV 10 I EtherCAT MII Receive-1 Data Valid
SD1_C1 11 I SDFM-1 Channel 1 Clock Input
FSIRXD_CLK 13 I FSIRX-D Input Clock
UARTC_TX 14 I/O UART-C Serial Data Transmit
OUTPUTXBAR8 15 O Output X-BAR Output 8
GPIO18 0, 4, 8, 12 F2 13 10 8 I/O General-Purpose Input Output 18
EPWM15_A 1 O ePWM-15 Output A
PMBUSA_ALERT 3 I/OD PMBus-A Open-Drain Bidirectional Alert Signal
I2CA_SCL 5 I/OD I2C-A Open-Drain Bidirectional Clock
UARTC_RX 6 I/O UART-C Serial Data Receive
SENT4 9 I/O SENT Input Pin 4
ESC_GPI21 13 I EtherCAT General-Purpose Input 21
ADCB_EXTMUXSEL0 14 O External ADC selection Mux output
GPIO19 0, 4, 8, 12 B1 5 5 I/O General-Purpose Input Output 19
EPWM10_B 1 O ePWM-10 Output B
EMIF1_CS3n 2 O External memory interface 1 chip select 3
ADCSOCBO 3 O ADC Start of Conversion B Output for External ADC (from ePWM modules)
SPIA_PTE 5 I/O SPI-A Peripheral Transmit Enable (PTE)
UARTE_RX 6 I/O UART-E Serial Data Receive
MCANC_TX 7 O MCAN-C Transmit
PMBUSA_ALERT 9 I/OD PMBus-A Open-Drain Bidirectional Alert Signal
ESC_TX1_DATA3 10 O EtherCAT MII Transmit-1 Data-3
SD1_C2 11 I SDFM-1 Channel 2 Clock Input
GPIO20 0, 4, 8, 12 C1 6 I/O General-Purpose Input Output 20
EPWM11_A 1 O ePWM-11 Output A
EMIF1_BA0 2 O External memory interface 1 bank address 0
EMIF1_DQM2 3 O External memory interface 1 Input/output mask for byte 2
SPIC_PICO 6 I/O SPI-C Peripheral In, Controller Out (PICO)
MCANB_RX 7 I MCAN-B Receive
ESC_TX1_DATA2 10 O EtherCAT MII Transmit-1 Data-2
SD1_D3 11 I SDFM-1 Channel 3 Data Input
GPIO21 0, 4, 8, 12 C2 7 I/O General-Purpose Input Output 21
EPWM11_B 1 O ePWM-11 Output B
EMIF1_BA1 2 O External memory interface 1 bank address 1
SPIC_POCI 6 I/O SPI-C Peripheral Out, Controller In (POCI)
MCANB_TX 7 O MCAN-B Transmit
ESC_TX1_DATA1 10 O EtherCAT MII Transmit-1 Data-1
SD1_C3 11 I SDFM-1 Channel 3 Clock Input
GPIO22 0, 4, 8, 12 F1 14 11 9 I/O General-Purpose Input Output 22
EPWM12_A 1 O ePWM-12 Output A
PMBUSA_SDA 3 I/OD PMBus-A Open-Drain Bidirectional Data
I2CB_SDA 5 I/OD I2C-B Open-Drain Bidirectional Data
UARTB_TX 6 I/O UART-B Serial Data Transmit
MCANC_TX 7 O MCAN-C Transmit
SENT5 9 I/O SENT Input Pin 5
ESC_GPO2 10 O EtherCAT General-Purpose Output 2
ESC_GPI22 13 I EtherCAT General-Purpose Input 22
ADCB_EXTMUXSEL1 14 O External ADC selection Mux output
GPIO23 0, 4, 8, 12 B8 159 127 87 I/O General-Purpose Input Output 23
EPWM12_B 1 O ePWM-12 Output B
PMBUSA_SCL 3 I/OD PMBus-A Open-Drain Bidirectional Clock
I2CB_SCL 5 I/OD I2C-B Open-Drain Bidirectional Clock
UARTB_RX 6 I/O UART-B Serial Data Receive
MCANC_RX 7 I MCAN-C Receive
SENT6 9 I/O SENT Input Pin 6
ESC_PHY_RESETn 10 O EtherCAT PHY Active Low Reset
ESC_GPI23 13 I EtherCAT General-Purpose Input 23
ADCC_EXTMUXSEL0 14 O External ADC selection Mux output
GPIO24 0, 4, 8, 12 C8 158 126 I/O General-Purpose Input Output 24
EPWM13_A 1 O ePWM-13 Output A
EMIF1_DQM0 2 O External memory interface 1 Input/output mask for byte 0
SPIB_PICO 5 I/O SPI-B Peripheral In, Controller Out (PICO)
LINB_TX 6 O LIN-B Transmit
MCANE_TX 7 O MCAN-E Transmit
ESC_RX0_CLK 10 I EtherCAT MII Receive-0 Clock
SD2_D1 11 I SDFM-2 Channel 1 Data Input
ESC_GPI24 13 I EtherCAT General-Purpose Input 24
EPWM2_A 14 O ePWM-2 Output A
OUTPUTXBAR1 15 O Output X-BAR Output 1
GPIO25 0, 4, 8, 12 D8 157 125 86 I/O General-Purpose Input Output 25
EPWM13_B 1 O ePWM-13 Output B
EMIF1_DQM1 2 O External memory interface 1 Input/output mask for byte 1
SPIB_POCI 5 I/O SPI-B Peripheral Out, Controller In (POCI)
LINB_RX 6 I LIN-B Receive
MCANE_RX 7 I MCAN-E Receive
PMBUSA_SDA 9 I/OD PMBus-A Open-Drain Bidirectional Data
ESC_RX0_DV 10 I EtherCAT MII Receive-0 Data Valid
SD2_C1 11 I SDFM-2 Channel 1 Clock Input
FSITXA_D1 13 O FSITX-A Optional Additional Data Output
EPWM2_B 14 O ePWM-2 Output B
OUTPUTXBAR2 15 O Output X-BAR Output 2
GPIO26 0, 4, 8, 12 B9 156 124 85 I/O General-Purpose Input Output 26
EPWM14_A 1 O ePWM-14 Output A
EMIF1_DQM2 2 O External memory interface 1 Input/output mask for byte 2
SPIB_CLK 5 I/O SPI-B Clock
UARTE_TX 6 I/O UART-E Serial Data Transmit
MCANE_TX 7 O MCAN-E Transmit
PMBUSA_CTL 9 I/O PMBus-A Control Signal - Target Input/Controller Output
ESC_RX0_ERR 10 I EtherCAT MII Receive-0 Error
SD2_D2 11 I SDFM-2 Channel 2 Data Input
FSITXA_D0 13 O FSITX-A Primary Data Output
ESC_MDIO_CLK 14 O EtherCAT MDIO Clock
OUTPUTXBAR3 15 O Output X-BAR Output 3
GPIO27 0, 4, 8, 12 C9 155 I/O General-Purpose Input Output 27
EPWM14_B 1 O ePWM-14 Output B
EMIF1_DQM3 2 O External memory interface 1 Input/output mask for byte 3
SPIB_PTE 5 I/O SPI-B Peripheral Transmit Enable (PTE)
UARTA_TX 6 I/O UART-A Serial Data Transmit
EPWM4_A 9 O ePWM-4 Output A
ESC_RX0_DATA0 10 I EtherCAT MII Receive-0 Data-0
SD2_C2 11 I SDFM-2 Channel 2 Clock Input
FSITXA_CLK 13 O FSITX-A Output Clock
ESC_MDIO_DATA 14 I/O EtherCAT MDIO Data
OUTPUTXBAR4 15 O Output X-BAR Output 4
GPIO28 0, 4, 8, 12 D9 154 I/O General-Purpose Input Output 28
EPWM15_A 1 O ePWM-15 Output A
EMIF1_CS4n 2 O External memory interface 1 chip select 4
EMIF1_CS2n 3 O External memory interface 1 chip select 2
UARTA_RX 6 I/O UART-A Serial Data Receive
EPWM4_B 9 O ePWM-4 Output B
ESC_RX0_DATA1 10 I EtherCAT MII Receive-0 Data-1
SD2_D3 11 I SDFM-2 Channel 3 Data Input
OUTPUTXBAR5 15 O Output X-BAR Output 5
GPIO29 0, 4, 8, 12 A9 151 121 84 I/O General-Purpose Input Output 29
EPWM15_B 1 O ePWM-15 Output B
PMBUSA_SDA 2 I/OD PMBus-A Open-Drain Bidirectional Data
UARTE_RX 6 I/O UART-E Serial Data Receive
I2CA_SDA 7 I/OD I2C-A Open-Drain Bidirectional Data
SENT3 9 I/O SENT Input Pin 3
ESC_LATCH0 10 I EtherCAT LatchSignal Input 0
ESC_I2C_SDA 13 I/OC EtherCAT I2C Data
ADCC_EXTMUXSEL1 14 O External ADC selection Mux output
OUTPUTXBAR6 15 O Output X-BAR Output 6
GPIO30 0, 4, 8, 12 A10 150 120 83 I/O General-Purpose Input Output 30
EPWM16_A 1 O ePWM-16 Output A
EMIF1_CLK 2 O External memory interface 1 clock
EMIF1_CS4n 3 O External memory interface 1 chip select 4
MCANC_RX 5 I MCAN-C Receive
SPID_PICO 6 I/O SPI-D Peripheral In, Controller Out (PICO)
EMIF1_A12 7 O External memory interface 1 address line 12
ESC_LATCH1 10 I EtherCAT LatchSignal Input 1
SD2_D4 11 I SDFM-2 Channel 4 Data Input
ESC_I2C_SCL 13 I/OC EtherCAT I2C Clock
ESC_SYNC1 14 O EtherCAT SyncSignal Output 1
OUTPUTXBAR7 15 O Output X-BAR Output 7
GPIO31 0, 4, 8, 12 B10 149 82 I/O General-Purpose Input Output 31
EPWM16_B 1 O ePWM-16 Output B
EMIF1_WEn 2 O External memory interface 1 write enable
EMIF1_RNW 3 O External memory interface 1 read not write
MCANC_TX 5 O MCAN-C Transmit
SPID_POCI 6 I/O SPI-D Peripheral Out, Controller In (POCI)
I2CA_SDA 7 I/OD I2C-A Open-Drain Bidirectional Data
ESC_RX1_DATA0 10 I EtherCAT MII Receive-1 Data-0
SD2_C4 11 I SDFM-2 Channel 4 Clock Input
FSITXD_D0 13 O FSITX-D Primary Data Output
OUTPUTXBAR8 15 O Output X-BAR Output 8
GPIO32 0, 4, 8, 12 G16 117 96 I/O General-Purpose Input Output 32
EMIF1_CS0n 2 O External memory interface 1 chip select 0
EMIF1_OEn 3 O External memory interface 1 output enable
SPIA_PICO 5 I/O SPI-A Peripheral In, Controller Out (PICO)
SPID_CLK 6 I/O SPI-D Clock
I2CA_SDA 7 I/OD I2C-A Open-Drain Bidirectional Data
OUTPUTXBAR9 9 O Output X-BAR Output 9
ESC_RX0_DATA0 10 I EtherCAT MII Receive-0 Data-0
GPIO33 0, 4, 8, 12 P14 I/O General-Purpose Input Output 33
EMIF1_RNW 2 O External memory interface 1 read not write
EMIF1_BA0 3 O External memory interface 1 bank address 0
SPIA_POCI 5 I/O SPI-A Peripheral Out, Controller In (POCI)
SPID_PTE 6 I/O SPI-D Peripheral Transmit Enable (PTE)
I2CA_SCL 7 I/OD I2C-A Open-Drain Bidirectional Clock
OUTPUTXBAR10 9 O Output X-BAR Output 10
ESC_LED_ERR 10 O
GPIO34 0, 4, 8, 12 D1 9 7 I/O General-Purpose Input Output 34
EPWM18_A 1 O ePWM-18 Output A
EMIF1_CS2n 2 O External memory interface 1 chip select 2
EMIF1_BA1 3 O External memory interface 1 bank address 1
SPIA_CLK 5 I/O SPI-A Clock
UARTF_TX 6 I/O UART-F Serial Data Transmit
I2CB_SDA 7 I/OD I2C-B Open-Drain Bidirectional Data
OUTPUTXBAR11 9 O Output X-BAR Output 11
ESC_LATCH0 10 I EtherCAT LatchSignal Input 0
EPWM3_B 13 O ePWM-3 Output B
ESC_SYNC0 14 O EtherCAT SyncSignal Output 0
OUTPUTXBAR1 15 O Output X-BAR Output 1
GPIO35 0, 4, 8, 12 E1 10 I/O General-Purpose Input Output 35
EPWM18_B 1 O ePWM-18 Output B
EMIF1_CS3n 2 O External memory interface 1 chip select 3
EMIF1_A0 3 O External memory interface 1 address line 0
SPIA_PTE 5 I/O SPI-A Peripheral Transmit Enable (PTE)
UARTF_RX 6 I/O UART-F Serial Data Receive
I2CB_SCL 7 I/OD I2C-B Open-Drain Bidirectional Clock
OUTPUTXBAR12 9 O Output X-BAR Output 12
ESC_LATCH1 10 I EtherCAT LatchSignal Input 1
ESC_SYNC1 14 O EtherCAT SyncSignal Output 1
GPIO36 0, 4, 8, 12 N14 I/O General-Purpose Input Output 36
EMIF1_WAIT 2 I External memory interface 1 Asynchronous SRAM WAIT
EMIF1_A1 3 O External memory interface 1 address line 1
UARTC_TX 5 I/O UART-C Serial Data Transmit
MCANC_RX 6 I MCAN-C Receive
OUTPUTXBAR13 9 O Output X-BAR Output 13
SD1_D1 11 I SDFM-1 Channel 1 Data Input
EMIF1_WEn 14 O External memory interface 1 write enable
GPIO37 0, 4, 8, 12 R16 85 I/O General-Purpose Input Output 37
EPWM18_A 1 O ePWM-18 Output A
EMIF1_OEn 2 O External memory interface 1 output enable
EMIF1_A2 3 O External memory interface 1 address line 2
UARTC_RX 5 I/O UART-C Serial Data Receive
MCANC_TX 6 O MCAN-C Transmit
OUTPUTXBAR14 9 O Output X-BAR Output 14
ESC_RX1_DATA1 10 I EtherCAT MII Receive-1 Data-1
SD1_D2 11 I SDFM-1 Channel 2 Data Input
EMIF1_D24 14 I/O External memory interface 1 data line 24
OUTPUTXBAR2 15 O Output X-BAR Output 2
GPIO38 0, 4, 8, 12 E14 125 104 72 I/O General-Purpose Input Output 38
EPWM18_B 1 O ePWM-18 Output B
EMIF1_A0 2 O External memory interface 1 address line 0
EMIF1_A3 3 O External memory interface 1 address line 3
UARTA_TX 5 I/O UART-A Serial Data Transmit
SPIE_PICO 6 I/O SPI-E Peripheral In, Controller Out (PICO)
OUTPUTXBAR15 9 O Output X-BAR Output 15
ESC_RX0_DATA1 10 I EtherCAT MII Receive-0 Data-1
SD1_D3 11 I SDFM-1 Channel 3 Data Input
FSITXD_D1 13 O FSITX-D Optional Additional Data Output
EMIF1_CS2n 14 O External memory interface 1 chip select 2
GPIO39 0, 4, 8, 12 P15 86 I/O General-Purpose Input Output 39
EMIF1_A1 2 O External memory interface 1 address line 1
EMIF1_A4 3 O External memory interface 1 address line 4
UARTA_RX 5 I/O UART-A Serial Data Receive
OUTPUTXBAR16 9 O Output X-BAR Output 16
ESC_MDIO_DATA 10 I/O EtherCAT MDIO Data
SD1_D4 11 I SDFM-1 Channel 4 Data Input
FSIRXD_CLK 13 I FSIRX-D Input Clock
ESC_LED_RUN 15 O
GPIO40 0, 4, 8, 12 P16 87 I/O General-Purpose Input Output 40
EPWM13_A 1 O ePWM-13 Output A
EMIF1_A2 2 O External memory interface 1 address line 2
MCANB_RX 5 I MCAN-B Receive
I2CB_SDA 6 I/OD I2C-B Open-Drain Bidirectional Data
OUTPUTXBAR9 9 O Output X-BAR Output 9
ESC_GPO2 10 O EtherCAT General-Purpose Output 2
SD4_C3 11 I SDFM-4 Channel 3 Clock Input
EPWM1_A 14 O ePWM-1 Output A
SD2_C1 15 I SDFM-2 Channel 1 Clock Input
GPIO41 0, 4, 8, 12 N15 89 73 50 I/O General-Purpose Input Output 41
EPWM13_B 1 O ePWM-13 Output B
EMIF1_A3 2 O External memory interface 1 address line 3
EPWM18_A 3 O ePWM-18 Output A
MCANB_TX 5 O MCAN-B Transmit
SPIE_POCI 6 I/O SPI-E Peripheral Out, Controller In (POCI)
I2CB_SCL 7 I/OD I2C-B Open-Drain Bidirectional Clock
OUTPUTXBAR10 9 O Output X-BAR Output 10
ESC_RX0_DATA2 10 I EtherCAT MII Receive-0 Data-2
SD4_D3 11 I SDFM-4 Channel 3 Data Input
FSIRXD_CLK 13 I FSIRX-D Input Clock
EPWM1_B 14 O ePWM-1 Output B
SD2_D1 15 I SDFM-2 Channel 1 Data Input
GPIO42 0, 4, 8, 12 C16 130 107 74 I/O General-Purpose Input Output 42
EPWM14_A 1 O ePWM-14 Output A
EMIF1_A2 2 O External memory interface 1 address line 2
EMIF1_A13 3 O External memory interface 1 address line 13
UARTA_TX 5 I/O UART-A Serial Data Transmit
SPIE_CLK 6 I/O SPI-E Clock
I2CA_SDA 7 I/OD I2C-A Open-Drain Bidirectional Data
OUTPUTXBAR13 9 O Output X-BAR Output 13
SD4_C3 10 I SDFM-4 Channel 3 Clock Input
SD4_C4 11 I SDFM-4 Channel 4 Clock Input
FSIRXD_D0 13 I FSIRX-D Primary Data Input
ADCE_EXTMUXSEL2 14 O External ADC selection Mux output
GPIO43 0, 4, 8, 12 C15 131 108 75 I/O General-Purpose Input Output 43
EPWM14_B 1 O ePWM-14 Output B
EMIF1_A4 2 O External memory interface 1 address line 4
EMIF1_D13 3 I/O External memory interface 1 data line 13
UARTA_RX 5 I/O UART-A Serial Data Receive
SPIE_PTE 6 I/O SPI-E Peripheral Transmit Enable (PTE)
I2CA_SCL 7 I/OD I2C-A Open-Drain Bidirectional Clock
OUTPUTXBAR14 9 O Output X-BAR Output 14
SD4_D4 11 I SDFM-4 Channel 4 Data Input
FSIRXD_D1 13 I FSIRX-D Optional Additional Data Input
ADCE_EXTMUXSEL3 14 O External ADC selection Mux output
GPIO44 0, 4, 8, 12 G14 114 I/O General-Purpose Input Output 44
EMIF1_A4 2 O External memory interface 1 address line 4
SPID_POCI 5 I/O SPI-D Peripheral Out, Controller In (POCI)
MCANB_RX 6 I MCAN-B Receive
UARTB_TX 7 I/O UART-B Serial Data Transmit
OUTPUTXBAR14 9 O Output X-BAR Output 14
ESC_TX1_CLK 10 I EtherCAT MII Transmit-1 Clock
SD3_C4 11 I SDFM-3 Channel 4 Clock Input
FSIRXD_CLK 13 I FSIRX-D Input Clock
GPIO45 0, 4, 8, 12 G15 116 I/O General-Purpose Input Output 45
EMIF1_A5 2 O External memory interface 1 address line 5
SPID_PTE 5 I/O SPI-D Peripheral Transmit Enable (PTE)
MCANB_TX 6 O MCAN-B Transmit
UARTB_RX 7 I/O UART-B Serial Data Receive
OUTPUTXBAR15 9 O Output X-BAR Output 15
ESC_TX1_ENA 10 I/O EtherCAT MII Transmit-1 Enable
SD3_D4 11 I SDFM-3 Channel 4 Data Input
FSIRXD_D0 13 I FSIRX-D Primary Data Input
GPIO46 0, 4, 8, 12 D14 128 I/O General-Purpose Input Output 46
EPWM4_A 1 O ePWM-4 Output A
EMIF1_A6 2 O External memory interface 1 address line 6
EPWM14_A 3 O ePWM-14 Output A
UARTC_TX 5 I/O UART-C Serial Data Transmit
MCANE_TX 7 O MCAN-E Transmit
ESC_MDIO_CLK 10 O EtherCAT MDIO Clock
SD3_C4 11 I SDFM-3 Channel 4 Clock Input
GPIO47 0, 4, 8, 12 D15 129 I/O General-Purpose Input Output 47
EPWM4_B 1 O ePWM-4 Output B
EMIF1_A7 2 O External memory interface 1 address line 7
EPWM14_B 3 O ePWM-14 Output B
UARTC_RX 5 I/O UART-C Serial Data Receive
MCANE_RX 7 I MCAN-E Receive
ESC_MDIO_DATA 10 I/O EtherCAT MDIO Data
SD4_C3 11 I SDFM-4 Channel 3 Clock Input
GPIO48 0, 4, 8, 12 N16 90 I/O General-Purpose Input Output 48
EMIF1_A8 2 O External memory interface 1 address line 8
UARTD_TX 5 I/O UART-D Serial Data Transmit
OUTPUTXBAR3 9 O Output X-BAR Output 3
ESC_PHY_CLK 10 O EtherCAT PHY Clock
SD1_D1 11 I SDFM-1 Channel 1 Data Input
EPWM3_A 13 O ePWM-3 Output A
SD2_C2 15 I SDFM-2 Channel 2 Clock Input
GPIO49 0, 4, 8, 12 M15 92 75 I/O General-Purpose Input Output 49
EMIF1_A9 2 O External memory interface 1 address line 9
EMIF1_A5 3 O External memory interface 1 address line 5
UARTD_RX 5 I/O UART-D Serial Data Receive
OUTPUTXBAR4 9 O Output X-BAR Output 4
ESC_TX1_DATA2 10 O EtherCAT MII Transmit-1 Data-2
SD1_C1 11 I SDFM-1 Channel 1 Clock Input
FSITXA_D0 13 O FSITX-A Primary Data Output
SD2_D1 15 I SDFM-2 Channel 1 Data Input
GPIO50 0, 4, 8, 12 M14 93 76 I/O General-Purpose Input Output 50
EPWM15_A 1 O ePWM-15 Output A
EMIF1_A10 2 O External memory interface 1 address line 10
EMIF1_A6 3 O External memory interface 1 address line 6
SPIC_PICO 6 I/O SPI-C Peripheral In, Controller Out (PICO)
MCANF_TX 7 O MCAN-F Transmit
ESC_TX1_DATA1 10 O EtherCAT MII Transmit-1 Data-1
SD1_D2 11 I SDFM-1 Channel 2 Data Input
FSITXA_D1 13 O FSITX-A Optional Additional Data Output
ESC_GPI25 14 I EtherCAT General-Purpose Input 25
SD2_D2 15 I SDFM-2 Channel 2 Data Input
GPIO51 0, 4, 8, 12 M13 94 77 I/O General-Purpose Input Output 51
EPWM15_B 1 O ePWM-15 Output B
EMIF1_A11 2 O External memory interface 1 address line 11
EMIF1_A7 3 O External memory interface 1 address line 7
SPIC_POCI 6 I/O SPI-C Peripheral Out, Controller In (POCI)
MCANF_RX 7 I MCAN-F Receive
ESC_TX1_CLK 10 I EtherCAT MII Transmit-1 Clock
SD1_C2 11 I SDFM-1 Channel 2 Clock Input
FSITXA_CLK 13 O FSITX-A Output Clock
ESC_GPI26 14 I EtherCAT General-Purpose Input 26
SD2_D3 15 I SDFM-2 Channel 3 Data Input
GPIO52 0, 4, 8, 12 L14 95 78 I/O General-Purpose Input Output 52
EPWM16_A 1 O ePWM-16 Output A
EMIF1_A12 2 O External memory interface 1 address line 12
EMIF1_A8 3 O External memory interface 1 address line 8
UARTD_TX 5 I/O UART-D Serial Data Transmit
SPIC_CLK 6 I/O SPI-C Clock
ESC_TX1_ENA 10 I/O EtherCAT MII Transmit-1 Enable
SD1_D3 11 I SDFM-1 Channel 3 Data Input
FSIRXA_D0 13 I FSIRX-A Primary Data Input
SD2_D4 15 I SDFM-2 Channel 4 Data Input
GPIO53 0, 4, 8, 12 L15 96 79 I/O General-Purpose Input Output 53
EPWM16_B 1 O ePWM-16 Output B
EMIF1_D31 2 I/O External memory interface 1 data line 31
EMIF1_A9 3 O External memory interface 1 address line 9
UARTD_RX 5 I/O UART-D Serial Data Receive
SPIC_PTE 6 I/O SPI-C Peripheral Transmit Enable (PTE)
ESC_PHY0_LINKSTATUS 10 I EtherCAT PHY-0 Link Status
SD1_C3 11 I SDFM-1 Channel 3 Clock Input
FSIRXA_D1 13 I FSIRX-A Optional Additional Data Input
ESC_GPI28 14 I EtherCAT General-Purpose Input 28
SD1_C1 15 I SDFM-1 Channel 1 Clock Input
GPIO54 0, 4, 8, 12 L16 97 80 I/O General-Purpose Input Output 54
EMIF1_D30 2 I/O External memory interface 1 data line 30
EMIF1_A10 3 O External memory interface 1 address line 10
SPIA_PICO 5 I/O SPI-A Peripheral In, Controller Out (PICO)
ESC_PHY_CLK 10 O EtherCAT PHY Clock
SD1_D4 11 I SDFM-1 Channel 4 Data Input
FSIRXA_CLK 13 I FSIRX-A Input Clock
ESC_GPI29 14 I EtherCAT General-Purpose Input 29
SD1_C2 15 I SDFM-1 Channel 2 Clock Input
GPIO55 0, 4, 8, 12 K13 99 I/O General-Purpose Input Output 55
EPWM16_B 1 O ePWM-16 Output B
EMIF1_D29 2 I/O External memory interface 1 data line 29
EMIF1_D0 3 I/O External memory interface 1 data line 0
SPIA_POCI 5 I/O SPI-A Peripheral Out, Controller In (POCI)
EMIF1_WAIT 6 I External memory interface 1 Asynchronous SRAM WAIT
ESC_PHY0_LINKSTATUS 10 I EtherCAT PHY-0 Link Status
SD1_C4 11 I SDFM-1 Channel 4 Clock Input
FSITXB_D0 13 O FSITX-B Primary Data Output
SD1_C3 15 I SDFM-1 Channel 3 Clock Input
GPIO56 0, 4, 8, 12 K14 100 82 I/O General-Purpose Input Output 56
EPWM17_A 1 O ePWM-17 Output A
EMIF1_D28 2 I/O External memory interface 1 data line 28
EMIF1_D1 3 I/O External memory interface 1 data line 1
SPIA_CLK 5 I/O SPI-A Clock
MCAND_TX 6 O MCAN-D Transmit
I2CA_SDA 7 I/OD I2C-A Open-Drain Bidirectional Data
ESC_PDI_UC_IRQ 10 O EtherCAT PDI IRQ Interrupt Line
SD2_D1 11 I SDFM-2 Channel 1 Data Input
FSITXB_CLK 13 O FSITX-B Output Clock
ESC_GPI30 14 I EtherCAT General-Purpose Input 30
SD1_C4 15 I SDFM-1 Channel 4 Clock Input
GPIO57 0, 4, 8, 12 K15 102 84 I/O General-Purpose Input Output 57
EPWM17_B 1 O ePWM-17 Output B
EMIF1_D27 2 I/O External memory interface 1 data line 27
EMIF1_D2 3 I/O External memory interface 1 data line 2
SPIA_PTE 5 I/O SPI-A Peripheral Transmit Enable (PTE)
MCAND_RX 6 I MCAN-D Receive
I2CA_SCL 7 I/OD I2C-A Open-Drain Bidirectional Clock
ESC_MDIO_DATA 10 I/O EtherCAT MDIO Data
SD2_C1 11 I SDFM-2 Channel 1 Clock Input
FSITXB_D1 13 O FSITX-B Optional Additional Data Output
ESC_GPI31 14 I EtherCAT General-Purpose Input 31
SD3_D3 15 I SDFM-3 Channel 3 Data Input
GPIO58 0, 4, 8, 12 K16 103 85 53 I/O General-Purpose Input Output 58
EPWM13_A 1 O ePWM-13 Output A
EMIF1_D26 2 I/O External memory interface 1 data line 26
EPWM8_A 3 O ePWM-8 Output A
SPIA_PICO 5 I/O SPI-A Peripheral In, Controller Out (PICO)
MCANC_RX 7 I MCAN-C Receive
SENT1 9 I/O SENT Input Pin 1
ESC_LED_LINK0_ACTIVE 10 O EtherCAT Link-0 Active
SD2_D2 11 I SDFM-2 Channel 2 Data Input
FSIRXB_D0 13 I FSIRX-B Primary Data Input
ESC_TX0_DATA3 14 O EtherCAT MII Transmit-0 Data-3
SD2_C2 15 I SDFM-2 Channel 2 Clock Input
GPIO59 0, 4, 8, 12 J16 104 86 54 I/O General-Purpose Input Output 59
EPWM5_A 1 O ePWM-5 Output A
EMIF1_D25 2 I/O External memory interface 1 data line 25
EPWM8_B 3 O ePWM-8 Output B
SPIA_POCI 5 I/O SPI-A Peripheral Out, Controller In (POCI)
MCANC_TX 7 O MCAN-C Transmit
SENT2 9 I/O SENT Input Pin 2
ESC_LED_LINK1_ACTIVE 10 O EtherCAT Link-1 Active
SD2_C2 11 I SDFM-2 Channel 2 Clock Input
FSIRXB_D1 13 I FSIRX-B Optional Additional Data Input
ESC_TX0_ENA 14 I/O EtherCAT MII Transmit-0 Enable
SD2_C3 15 I SDFM-2 Channel 3 Clock Input
GPIO60 0, 4, 8, 12 J15 106 88 56 I/O General-Purpose Input Output 60
EPWM3_B 1 O ePWM-3 Output B
EMIF1_D24 2 I/O External memory interface 1 data line 24
EMIF1_D0 3 I/O External memory interface 1 data line 0
SPIA_CLK 5 I/O SPI-A Clock
OUTPUTXBAR3 6 O Output X-BAR Output 3
SENT3 9 I/O SENT Input Pin 3
ESC_LED_ERR 10 O
ESC_LATCH0 11 I EtherCAT LatchSignal Input 0
FSIRXB_CLK 13 I FSIRX-B Input Clock
SD2_C4 15 I SDFM-2 Channel 4 Clock Input
GPIO61 0, 4, 8, 12 J13 108 89 57 I/O General-Purpose Input Output 61
EPWM17_B 1 O ePWM-17 Output B
EMIF1_D23 2 I/O External memory interface 1 data line 23
EMIF1_D6 3 I/O External memory interface 1 data line 6
SPIA_PTE 5 I/O SPI-A Peripheral Transmit Enable (PTE)
MCANC_RX 7 I MCAN-C Receive
OUTPUTXBAR4 9 O Output X-BAR Output 4
ESC_LED_RUN 10 O
SD2_C3 11 I SDFM-2 Channel 3 Clock Input
FSITXD_CLK 13 O FSITX-D Output Clock
ESC_LATCH1 14 I EtherCAT LatchSignal Input 1
GPIO62 0, 4, 8, 12 H13 109 90 58 I/O General-Purpose Input Output 62
EPWM17_A 1 O ePWM-17 Output A
EMIF1_D22 2 I/O External memory interface 1 data line 22
EMIF1_D7 3 I/O External memory interface 1 data line 7
MCANC_RX 6 I MCAN-C Receive
MCANC_TX 7 O MCAN-C Transmit
SENT4 9 I/O SENT Input Pin 4
ESC_LED_STATE_RUN 10 O
SD2_D4 11 I SDFM-2 Channel 4 Data Input
FSITXD_D0 13 O FSITX-D Primary Data Output
ESC_MDIO_CLK 14 O EtherCAT MDIO Clock
GPIO63 0, 4, 8, 12 H14 110 91 59 I/O General-Purpose Input Output 63
EPWM9_A 1 O ePWM-9 Output A
EMIF1_D21 2 I/O External memory interface 1 data line 21
EMIF1_RNW 3 O External memory interface 1 read not write
SPIB_PICO 5 I/O SPI-B Peripheral In, Controller Out (PICO)
MCANC_TX 6 O MCAN-C Transmit
SENT5 9 I/O SENT Input Pin 5
ESC_RX1_DATA0 10 I EtherCAT MII Receive-1 Data-0
SD1_D1 11 I SDFM-1 Channel 1 Data Input
FSITXD_D1 13 O FSITX-D Optional Additional Data Output
ADCD_EXTMUXSEL0 14 O External ADC selection Mux output
SD2_C4 15 I SDFM-2 Channel 4 Clock Input
GPIO64 0, 4, 8, 12 H15 111 92 60 I/O General-Purpose Input Output 64
EPWM9_B 1 O ePWM-9 Output B
EMIF1_D20 2 I/O External memory interface 1 data line 20
EMIF1_WAIT 3 I External memory interface 1 Asynchronous SRAM WAIT
SPIB_POCI 5 I/O SPI-B Peripheral Out, Controller In (POCI)
MCANA_TX 6 O MCAN-A Transmit
UARTF_TX 7 I/O UART-F Serial Data Transmit
SENT6 9 I/O SENT Input Pin 6
ESC_RX1_DATA1 10 I EtherCAT MII Receive-1 Data-1
SD1_C1 11 I SDFM-1 Channel 1 Clock Input
FSITXD_CLK 13 O FSITX-D Output Clock
ADCD_EXTMUXSEL1 14 O External ADC selection Mux output
GPIO65 0, 4, 8, 12 H16 112 93 61 I/O General-Purpose Input Output 65
EPWM10_A 1 O ePWM-10 Output A
EMIF1_D19 2 I/O External memory interface 1 data line 19
EMIF1_WEn 3 O External memory interface 1 write enable
SPIB_CLK 5 I/O SPI-B Clock
MCANA_RX 6 I MCAN-A Receive
UARTF_RX 7 I/O UART-F Serial Data Receive
ESC_RX1_DATA2 10 I EtherCAT MII Receive-1 Data-2
SD1_D2 11 I SDFM-1 Channel 2 Data Input
FSITXB_CLK 13 O FSITX-B Output Clock
ADCD_EXTMUXSEL2 14 O External ADC selection Mux output
ESC_GPI13 15 I EtherCAT General-Purpose Input 13
GPIO66 0, 4, 8, 12 G13 113 94 62 I/O General-Purpose Input Output 66
EPWM10_B 1 O ePWM-10 Output B
EMIF1_D18 2 I/O External memory interface 1 data line 18
EMIF1_OEn 3 O External memory interface 1 output enable
SPIB_PTE 5 I/O SPI-B Peripheral Transmit Enable (PTE)
I2CB_SDA 6 I/OD I2C-B Open-Drain Bidirectional Data
ESC_RX1_DATA3 10 I EtherCAT MII Receive-1 Data-3
SD1_C2 11 I SDFM-1 Channel 2 Clock Input
FSITXB_D1 13 O FSITX-B Optional Additional Data Output
ADCD_EXTMUXSEL3 14 O External ADC selection Mux output
ESC_GPI14 15 I EtherCAT General-Purpose Input 14
GPIO67 0, 4, 8, 12 B16 132 I/O General-Purpose Input Output 67
EPWM17_A 1 O ePWM-17 Output A
EMIF1_D17 2 I/O External memory interface 1 data line 17
LINB_TX 5 O LIN-B Transmit
MCAND_TX 6 O MCAN-D Transmit
SD1_D3 11 I SDFM-1 Channel 3 Data Input
FSITXB_CLK 13 O FSITX-B Output Clock
GPIO68 0, 4, 8, 12 B15 133 109 I/O General-Purpose Input Output 68
EPWM17_B 1 O ePWM-17 Output B
EMIF1_D16 2 I/O External memory interface 1 data line 16
EMIF1_D4 3 I/O External memory interface 1 data line 4
LINB_RX 5 I LIN-B Receive
MCAND_RX 6 I MCAN-D Receive
EMIF1_D13 7 I/O External memory interface 1 data line 13
ESC_PHY1_LINKSTATUS 10 I EtherCAT PHY-1 Link Status
SD1_C3 11 I SDFM-1 Channel 3 Clock Input
FSIRXB_D1 13 I FSIRX-B Optional Additional Data Input
ESC_GPI15 15 I EtherCAT General-Purpose Input 15
GPIO69 0, 4, 8, 12 A15 134 I/O General-Purpose Input Output 69
EPWM11_A 1 O ePWM-11 Output A
EMIF1_D15 2 I/O External memory interface 1 data line 15
SPIC_PICO 5 I/O SPI-C Peripheral In, Controller Out (PICO)
I2CB_SCL 6 I/OD I2C-B Open-Drain Bidirectional Clock
ESC_RX1_CLK 10 I EtherCAT MII Receive-1 Clock
SD1_D4 11 I SDFM-1 Channel 4 Data Input
FSITXB_D0 13 O FSITX-B Primary Data Output
GPIO70 0, 4, 8, 12 C14 135 110 76 I/O General-Purpose Input Output 70
EPWM11_B 1 O ePWM-11 Output B
EMIF1_D14 2 I/O External memory interface 1 data line 14
SPIC_POCI 5 I/O SPI-C Peripheral Out, Controller In (POCI)
MCANC_RX 6 I MCAN-C Receive
UARTB_TX 7 I/O UART-B Serial Data Transmit
ESC_RX1_DV 10 I EtherCAT MII Receive-1 Data Valid
SD1_C4 11 I SDFM-1 Channel 4 Clock Input
FSIRXB_D0 13 I FSIRX-B Primary Data Input
ESC_GPI16 15 I EtherCAT General-Purpose Input 16
GPIO71 0, 4, 8, 12 B14 136 111 77 I/O General-Purpose Input Output 71
EPWM12_A 1 O ePWM-12 Output A
EPWM11_A 2 O ePWM-11 Output A
EMIF1_D5 3 I/O External memory interface 1 data line 5
SPIC_CLK 5 I/O SPI-C Clock
MCANC_TX 6 O MCAN-C Transmit
UARTB_RX 7 I/O UART-B Serial Data Receive
EMIF1_D13 9 I/O External memory interface 1 data line 13
ESC_RX1_ERR 10 I EtherCAT MII Receive-1 Error
SD3_D1 11 I SDFM-3 Channel 1 Data Input
FSITXC_CLK 13 O FSITX-C Output Clock
FSITXB_D0 14 O FSITX-B Primary Data Output
GPIO72 0, 4, 8, 12 A14 139 114 80 I/O General-Purpose Input Output 72
EPWM12_B 1 O ePWM-12 Output B
EMIF1_D12 2 I/O External memory interface 1 data line 12
SPIC_PTE 5 I/O SPI-C Peripheral Transmit Enable (PTE)
MCANB_RX 6 I MCAN-B Receive
UARTA_TX 7 I/O UART-A Serial Data Transmit
OUTPUTXBAR8 9 O Output X-BAR Output 8
ESC_TX1_DATA3 10 O EtherCAT MII Transmit-1 Data-3
SD3_D2 11 I SDFM-3 Channel 2 Data Input
FSITXC_D0 13 O FSITX-C Primary Data Output
SD3_C1 14 I SDFM-3 Channel 1 Clock Input
GPIO73 0, 4, 8, 12 E13 140 I/O General-Purpose Input Output 73
EPWM5_B 1 O ePWM-5 Output B
EMIF1_D11 2 I/O External memory interface 1 data line 11
XCLKOUT 3 O External Clock Output. This pin outputs a divided-down version of a chosen clock signal from within the device.
MCANB_TX 6 O MCAN-B Transmit
UARTA_RX 7 I/O UART-A Serial Data Receive
OUTPUTXBAR6 9 O Output X-BAR Output 6
ESC_TX1_DATA2 10 O EtherCAT MII Transmit-1 Data-2
SD4_D4 11 I SDFM-4 Channel 4 Data Input
FSITXC_CLK 13 O FSITX-C Output Clock
SD2_D2 14 I SDFM-2 Channel 2 Data Input
GPIO74 0, 4, 8, 12 D13 141 I/O General-Purpose Input Output 74
EPWM8_A 1 O ePWM-8 Output A
EMIF1_D10 2 I/O External memory interface 1 data line 10
MCANC_TX 6 O MCAN-C Transmit
ESC_TX1_DATA1 10 O EtherCAT MII Transmit-1 Data-1
SD1_D4 11 I SDFM-1 Channel 4 Data Input
FSITXA_D0 13 O FSITX-A Primary Data Output
SD2_C2 14 I SDFM-2 Channel 2 Clock Input
GPIO75 0, 4, 8, 12 C13 142 I/O General-Purpose Input Output 75
EPWM8_B 1 O ePWM-8 Output B
EMIF1_D9 2 I/O External memory interface 1 data line 9
SPID_CLK 5 I/O SPI-D Clock
MCANC_RX 6 I MCAN-C Receive
OUTPUTXBAR16 9 O Output X-BAR Output 16
ESC_TX1_DATA0 10 O EtherCAT MII Transmit-1 Data-0
SD2_D3 14 I SDFM-2 Channel 3 Data Input
GPIO76 0, 4, 8, 12 B13 143 115 I/O General-Purpose Input Output 76
EPWM9_A 1 O ePWM-9 Output A
EMIF1_D8 2 I/O External memory interface 1 data line 8
UARTD_TX 5 I/O UART-D Serial Data Transmit
MCANE_TX 7 O MCAN-E Transmit
SD4_D4 9 I SDFM-4 Channel 4 Data Input
ESC_PHY_RESETn 10 O EtherCAT PHY Active Low Reset
SD3_C1 11 I SDFM-3 Channel 1 Clock Input
FSIRXC_D0 13 I FSIRX-C Primary Data Input
SD2_C3 14 I SDFM-2 Channel 3 Clock Input
ESC_GPI17 15 I EtherCAT General-Purpose Input 17
GPIO77 0, 4, 8, 12 A13 144 116 I/O General-Purpose Input Output 77
EPWM9_B 1 O ePWM-9 Output B
EMIF1_D7 2 I/O External memory interface 1 data line 7
UARTD_RX 5 I/O UART-D Serial Data Receive
MCANE_RX 7 I MCAN-E Receive
SD1_D4 9 I SDFM-1 Channel 4 Data Input
ESC_RX0_CLK 10 I EtherCAT MII Receive-0 Clock
SD3_D1 11 I SDFM-3 Channel 1 Data Input
FSITXB_D0 13 O FSITX-B Primary Data Output
SD2_D4 14 I SDFM-2 Channel 4 Data Input
GPIO78 0, 4, 8, 12 D12 145 117 I/O General-Purpose Input Output 78
EPWM10_A 1 O ePWM-10 Output A
EMIF1_D6 2 I/O External memory interface 1 data line 6
EPWM11_A 3 O ePWM-11 Output A
MCANF_TX 7 O MCAN-F Transmit
SD4_D4 9 I SDFM-4 Channel 4 Data Input
ESC_RX0_DV 10 I EtherCAT MII Receive-0 Data Valid
SD3_C2 11 I SDFM-3 Channel 2 Clock Input
FSITXC_D1 13 O FSITX-C Optional Additional Data Output
SD2_C4 14 I SDFM-2 Channel 4 Clock Input
ESC_GPI18 15 I EtherCAT General-Purpose Input 18
GPIO79 0, 4, 8, 12 C12 146 I/O General-Purpose Input Output 79
EPWM10_B 1 O ePWM-10 Output B
EMIF1_D5 2 I/O External memory interface 1 data line 5
ERRORSTS 5 O Error Status Output. This signal requires an external pulldown.
ESC_RX0_ERR 10 I EtherCAT MII Receive-0 Error
SD3_D2 11 I SDFM-3 Channel 2 Data Input
FSITXC_D0 13 O FSITX-C Primary Data Output
SD2_D1 14 I SDFM-2 Channel 1 Data Input
GPIO80 0, 4, 8, 12 B12 I/O General-Purpose Input Output 80
EPWM11_A 1 O ePWM-11 Output A
EMIF1_D4 2 I/O External memory interface 1 data line 4
ERRORSTS 5 O Error Status Output. This signal requires an external pulldown.
SD1_D4 9 I SDFM-1 Channel 4 Data Input
ESC_RX0_DATA0 10 I EtherCAT MII Receive-0 Data-0
SD3_C3 11 I SDFM-3 Channel 3 Clock Input
SD2_C1 14 I SDFM-2 Channel 1 Clock Input
GPIO81 0, 4, 8, 12 A12 I/O General-Purpose Input Output 81
EPWM11_B 1 O ePWM-11 Output B
EMIF1_D3 2 I/O External memory interface 1 data line 3
ESC_RX0_DATA1 10 I EtherCAT MII Receive-0 Data-1
SD3_D3 11 I SDFM-3 Channel 3 Data Input
GPIO82 0, 4, 8, 12 D10 I/O General-Purpose Input Output 82
EPWM12_A 1 O ePWM-12 Output A
EMIF1_D2 2 I/O External memory interface 1 data line 2
ESC_RX0_DATA2 10 I EtherCAT MII Receive-0 Data-2
SD3_C2 11 I SDFM-3 Channel 2 Clock Input
GPIO83 0, 4, 8, 12 A11 I/O General-Purpose Input Output 83
EPWM12_B 1 O ePWM-12 Output B
EMIF1_D1 2 I/O External memory interface 1 data line 1
ESC_RX0_DATA3 10 I EtherCAT MII Receive-0 Data-3
SD3_D2 11 I SDFM-3 Channel 2 Data Input
GPIO84 0, 4, 8, 12 D11 148 119 81 I/O General-Purpose Input Output 84
EPWM12_B 1 O ePWM-12 Output B
EMIF1_D1 2 I/O External memory interface 1 data line 1
EMIF1_CS4n 3 O External memory interface 1 chip select 4
SPIC_PICO 5 I/O SPI-C Peripheral In, Controller Out (PICO)
UARTA_TX 6 I/O UART-A Serial Data Transmit
MCANF_RX 7 I MCAN-F Receive
ESC_TX0_ENA 10 I/O EtherCAT MII Transmit-0 Enable
SD3_C2 11 I SDFM-3 Channel 2 Clock Input
FSITXC_D1 13 O FSITX-C Optional Additional Data Output
ESC_RX0_DATA3 14 I EtherCAT MII Receive-0 Data-3
ESC_GPO24 15 O EtherCAT General-Purpose Output 24
GPIO85 0, 4, 8, 12 B11 I/O General-Purpose Input Output 85
EPWM13_A 1 O ePWM-13 Output A
EMIF1_D0 2 I/O External memory interface 1 data line 0
UARTA_RX 6 I/O UART-A Serial Data Receive
EMIF1_DQM2 9 O External memory interface 1 Input/output mask for byte 2
ESC_TX0_CLK 10 I EtherCAT MII Transmit-0 Clock
SD3_D3 11 I SDFM-3 Channel 3 Data Input
GPIO86 0, 4, 8, 12 C11 I/O General-Purpose Input Output 86
EPWM13_B 1 O ePWM-13 Output B
EMIF1_A13 2 O External memory interface 1 address line 13
EMIF1_CAS 3 O External memory interface 1 column address strobe
UARTD_TX 6 I/O UART-D Serial Data Transmit
ESC_PHY0_LINKSTATUS 10 I EtherCAT PHY-0 Link Status
SD3_C3 11 I SDFM-3 Channel 3 Clock Input
GPIO87 0, 4, 8, 12 C10 I/O General-Purpose Input Output 87
EPWM14_A 1 O ePWM-14 Output A
EMIF1_A14 2 O External memory interface 1 address line 14
EMIF1_RAS 3 O External memory interface 1 row address strobe
UARTD_RX 6 I/O UART-D Serial Data Receive
EMIF1_DQM3 9 O External memory interface 1 Input/output mask for byte 3
ESC_TX0_DATA0 10 O EtherCAT MII Transmit-0 Data-0
SD3_D4 11 I SDFM-3 Channel 4 Data Input
GPIO88 0, 4, 8, 12 C3 I/O General-Purpose Input Output 88
EPWM14_B 1 O ePWM-14 Output B
EMIF1_A15 2 O External memory interface 1 address line 15
EMIF1_DQM0 3 O External memory interface 1 Input/output mask for byte 0
EMIF1_DQM1 9 O External memory interface 1 Input/output mask for byte 1
ESC_TX0_DATA1 10 O EtherCAT MII Transmit-0 Data-1
SD3_C4 11 I SDFM-3 Channel 4 Clock Input
GPIO89 0, 4, 8, 12 D4 I/O General-Purpose Input Output 89
EPWM15_A 1 O ePWM-15 Output A
EMIF1_A16 2 O External memory interface 1 address line 16
EMIF1_DQM1 3 O External memory interface 1 Input/output mask for byte 1
SPID_PTE 5 I/O SPI-D Peripheral Transmit Enable (PTE)
EMIF1_CAS 9 O External memory interface 1 column address strobe
ESC_TX0_DATA2 10 O EtherCAT MII Transmit-0 Data-2
SD1_D3 11 I SDFM-1 Channel 3 Data Input
SD4_D1 14 I SDFM-4 Channel 1 Data Input
GPIO90 0, 4, 8, 12 D3 I/O General-Purpose Input Output 90
EPWM15_B 1 O ePWM-15 Output B
EMIF1_A17 2 O External memory interface 1 address line 17
EMIF1_DQM2 3 O External memory interface 1 Input/output mask for byte 2
SPID_CLK 5 I/O SPI-D Clock
EMIF1_RAS 9 O External memory interface 1 row address strobe
ESC_TX0_DATA3 10 O EtherCAT MII Transmit-0 Data-3
SD1_C3 11 I SDFM-1 Channel 3 Clock Input
SD4_C1 14 I SDFM-4 Channel 1 Clock Input
GPIO91 0, 4, 8, 12 D2 I/O General-Purpose Input Output 91
EPWM16_A 1 O ePWM-16 Output A
EMIF1_A18 2 O External memory interface 1 address line 18
EMIF1_DQM3 3 O External memory interface 1 Input/output mask for byte 3
SPID_PICO 5 I/O SPI-D Peripheral In, Controller Out (PICO)
I2CA_SDA 6 I/OD I2C-A Open-Drain Bidirectional Data
MCAND_TX 7 O MCAN-D Transmit
EMIF1_DQM2 9 O External memory interface 1 Input/output mask for byte 2
SD4_D2 11 I SDFM-4 Channel 2 Data Input
OUTPUTXBAR9 14 O Output X-BAR Output 9
GPIO92 0, 4, 8, 12 E2 I/O General-Purpose Input Output 92
EPWM16_B 1 O ePWM-16 Output B
EMIF1_A19 2 O External memory interface 1 address line 19
EMIF1_BA1 3 O External memory interface 1 bank address 1
SPID_POCI 5 I/O SPI-D Peripheral Out, Controller In (POCI)
I2CA_SCL 6 I/OD I2C-A Open-Drain Bidirectional Clock
MCAND_RX 7 I MCAN-D Receive
EMIF1_DQM0 9 O External memory interface 1 Input/output mask for byte 0
FSIRXD_CLK 10 I FSIRX-D Input Clock
SD4_C2 11 I SDFM-4 Channel 2 Clock Input
OUTPUTXBAR10 14 O Output X-BAR Output 10
GPIO93 0, 4, 8, 12 E3 I/O General-Purpose Input Output 93
EPWM17_A 1 O ePWM-17 Output A
EMIF1_BA0 3 O External memory interface 1 bank address 0
SPID_CLK 5 I/O SPI-D Clock
ESC_TX1_CLK 10 I EtherCAT MII Transmit-1 Clock
SD4_D3 11 I SDFM-4 Channel 3 Data Input
OUTPUTXBAR11 14 O Output X-BAR Output 11
GPIO94 0, 4, 8, 12 E4 I/O General-Purpose Input Output 94
EPWM17_B 1 O ePWM-17 Output B
SPID_PTE 5 I/O SPI-D Peripheral Transmit Enable (PTE)
EMIF1_BA1 9 O External memory interface 1 bank address 1
ESC_TX1_ENA 10 I/O EtherCAT MII Transmit-1 Enable
SD4_C3 11 I SDFM-4 Channel 3 Clock Input
OUTPUTXBAR12 14 O Output X-BAR Output 12
GPIO95 0, 4, 8, 12 E5 I/O General-Purpose Input Output 95
EPWM18_A 1 O ePWM-18 Output A
ESC_GPO10 10 O EtherCAT General-Purpose Output 10
SD1_D1 11 I SDFM-1 Channel 1 Data Input
OUTPUTXBAR13 14 O Output X-BAR Output 13
GPIO96 0, 4, 8, 12 F3 I/O General-Purpose Input Output 96
EPWM18_B 1 O ePWM-18 Output B
ESC_GPO11 10 O EtherCAT General-Purpose Output 11
SD1_C1 11 I SDFM-1 Channel 1 Clock Input
OUTPUTXBAR14 14 O Output X-BAR Output 14
GPIO97 0, 4, 8, 12 F4 I/O General-Purpose Input Output 97
ESC_GPI17 10 I EtherCAT General-Purpose Input 17
SD1_D2 11 I SDFM-1 Channel 2 Data Input
OUTPUTXBAR15 14 O Output X-BAR Output 15
GPIO98 0, 4, 8, 12 F5 I/O General-Purpose Input Output 98
ESC_GPI18 10 I EtherCAT General-Purpose Input 18
SD1_C2 11 I SDFM-1 Channel 2 Clock Input
OUTPUTXBAR16 14 O Output X-BAR Output 16
GPIO99 0, 4, 8, 12 G5 I/O General-Purpose Input Output 99
EPWM8_A 1 O ePWM-8 Output A
EMIF1_DQM3 2 O External memory interface 1 Input/output mask for byte 3
EMIF1_D17 3 I/O External memory interface 1 data line 17
ESC_GPI21 10 I EtherCAT General-Purpose Input 21
SD4_D4 11 I SDFM-4 Channel 4 Data Input
GPIO100 0, 4, 8, 12 B4 I/O General-Purpose Input Output 100
EPWM9_A 1 O ePWM-9 Output A
EMIF1_BA1 2 O External memory interface 1 bank address 1
EMIF1_D24 3 I/O External memory interface 1 data line 24
SPIC_PICO 5 I/O SPI-C Peripheral In, Controller Out (PICO)
SPIA_PICO 6 I/O SPI-A Peripheral In, Controller Out (PICO)
SD1_D1 9 I SDFM-1 Channel 1 Data Input
ESC_GPI0 10 I EtherCAT General-Purpose Input 0
SD4_C4 11 I SDFM-4 Channel 4 Clock Input
FSITXA_D0 13 O FSITX-A Primary Data Output
FSIRXD_D1 14 I FSIRX-D Optional Additional Data Input
GPIO101 0, 4, 8, 12 B5 I/O General-Purpose Input Output 101
EPWM18_A 1 O ePWM-18 Output A
EMIF1_A5 2 O External memory interface 1 address line 5
SPIC_POCI 5 I/O SPI-C Peripheral Out, Controller In (POCI)
ESC_GPI1 10 I EtherCAT General-Purpose Input 1
FSITXA_D1 13 O FSITX-A Optional Additional Data Output
GPIO103 0, 4, 8, 12 D16 126 105 I/O General-Purpose Input Output 103
EPWM8_B 1 O ePWM-8 Output B
EMIF1_BA0 2 O External memory interface 1 bank address 0
EMIF1_D3 3 I/O External memory interface 1 data line 3
SPIC_PTE 5 I/O SPI-C Peripheral Transmit Enable (PTE)
ESC_GPI3 10 I EtherCAT General-Purpose Input 3
SD4_C4 11 I SDFM-4 Channel 4 Clock Input
FSIRXA_D0 13 I FSIRX-A Primary Data Input
ESC_GPO25 15 O EtherCAT General-Purpose Output 25
GPIO105 0, 4, 8, 12 J14 I/O General-Purpose Input Output 105
EPWM18_B 1 O ePWM-18 Output B
I2CA_SCL 5 I/OD I2C-A Open-Drain Bidirectional Clock
ESC_GPI5 10 I EtherCAT General-Purpose Input 5
SD3_C1 11 I SDFM-3 Channel 1 Clock Input
FSIRXA_CLK 13 I FSIRX-A Input Clock
GPIO127 0, 4, 8, 12 F13 118 97 64 I/O General-Purpose Input Output 127
EPWM18_A 1 O ePWM-18 Output A
EMIF1_D18 2 I/O External memory interface 1 data line 18
EMIF1_A11 3 O External memory interface 1 address line 11
SPID_POCI 5 I/O SPI-D Peripheral Out, Controller In (POCI)
ESC_GPI27 10 I EtherCAT General-Purpose Input 27
SD1_C3 11 I SDFM-1 Channel 3 Clock Input
FSIRXC_D1 13 I FSIRX-C Optional Additional Data Input
ESC_SYNC0 14 O EtherCAT SyncSignal Output 0
ESC_GPO26 15 O EtherCAT General-Purpose Output 26
GPIO219 0, 4, 8, 12 M16 91 74 51 I/O General-Purpose Input Output 219
ERRORSTS 1 O Error Status Output. This signal requires an external pulldown.
EMIF1_A19 2 O External memory interface 1 address line 19
EPWM18_B 3 O ePWM-18 Output B
OUTPUTXBAR1 9 O Output X-BAR Output 1
XCLKOUT 10 O External Clock Output. This pin outputs a divided-down version of a chosen clock signal from within the device.
SD2_C1 11 I SDFM-2 Channel 1 Clock Input
ESC_GPI8 13 I EtherCAT General-Purpose Input 8
ESC_TX0_ENA 14 I/O EtherCAT MII Transmit-0 Enable
ESC_GPO27 15 O EtherCAT General-Purpose Output 27
GPIO220 0, 4, 8, 12 E16 123 102 70 I/O General-Purpose Input Output 220
EPWM6_A 1 O ePWM-6 Output A
SPID_POCI 5 I/O SPI-D Peripheral Out, Controller In (POCI)
MCANC_TX 6 O MCAN-C Transmit
OUTPUTXBAR2 9 O Output X-BAR Output 2
SD3_D3 11 I SDFM-3 Channel 3 Data Input
ESC_GPI9 13 I EtherCAT General-Purpose Input 9
ESC_GPO28 15 O EtherCAT General-Purpose Output 28
X1 ALT I/O Crystal oscillator input or single-ended clock input. The device initialization software must configure this pin before the crystal oscillator is enabled. To use this oscillator, a quartz crystal circuit must be connected to X1 and X2. This pin can also be used to feed a single-ended 3.3-V level clock.
GPIO221 0, 4, 8, 12 F16 121 100 68 I/O General-Purpose Input Output 221
EPWM6_B 1 O ePWM-6 Output B
EMIF1_CAS 3 O External memory interface 1 column address strobe
SPID_PTE 5 I/O SPI-D Peripheral Transmit Enable (PTE)
MCANC_RX 6 I MCAN-C Receive
OUTPUTXBAR3 9 O Output X-BAR Output 3
SD3_C3 11 I SDFM-3 Channel 3 Clock Input
ESC_GPI10 13 I EtherCAT General-Purpose Input 10
ESC_GPO29 15 O EtherCAT General-Purpose Output 29
X2 ALT I/O Crystal oscillator output.
GPIO222 0, 4, 8, 12 T14 77 64 42 I/O General-Purpose Input Output 222
TDI 1 I JTAG test data input (TDI) with internal pullup. TDI is clocked into the selected register (instruction or data) on a rising edge of TCK.
EPWM7_A 2 O ePWM-7 Output A
SPID_PICO 5 I/O SPI-D Peripheral In, Controller Out (PICO)
UARTB_TX 6 I/O UART-B Serial Data Transmit
I2CB_SCL 7 I/OD I2C-B Open-Drain Bidirectional Clock
OUTPUTXBAR4 9 O Output X-BAR Output 4
SPIC_CLK 10 I/O SPI-C Clock
SD3_D4 11 I SDFM-3 Channel 4 Data Input
ESC_GPI11 13 I EtherCAT General-Purpose Input 11
ESC_GPO30 15 O EtherCAT General-Purpose Output 30
GPIO223 0, 4, 8, 12 R14 78 65 43 I/O General-Purpose Input Output 223
TDO 1 O JTAG scan out, test data output (TDO). The contents of the selected register (instruction or data) are shifted out of TDO on the falling edge of TCK.
EPWM7_B 2 O ePWM-7 Output B
SPID_CLK 5 I/O SPI-D Clock
UARTB_RX 6 I/O UART-B Serial Data Receive
I2CB_SDA 7 I/OD I2C-B Open-Drain Bidirectional Data
OUTPUTXBAR5 9 O Output X-BAR Output 5
SPIC_PTE 10 I/O SPI-C Peripheral Transmit Enable (PTE)
SD3_C4 11 I SDFM-3 Channel 4 Clock Input
ESC_GPI12 13 I EtherCAT General-Purpose Input 12
ESC_GPO31 15 O EtherCAT General-Purpose Output 31
TEST, JTAG, AND RESET
FLT3 M12 I/O Flash test pin 3. Reserved for TI. Must be left unconnected.
TCK R15 83 70 48 I JTAG test clock with internal pullup.
TMS T15 82 69 47 I/O JTAG test-mode select (TMS) with internal pullup. This serial control input is clocked into the TAP controller on the rising edge of TCK. This device does not have a TRSTn pin. An external pullup resistor (recommended 2.2 kΩ) on the TMS pin to VDDIO should be placed on the board to keep JTAG in reset during normal operation.
VREGENZ 65 I Internal voltage regulator enable with internal pullup. Tie low to VSS to enable internal VREG. Tie high to VDDIO to use an external supply.
XRSn F14 124 103 71 I/OD Device Reset (in) and Watchdog Reset (out). During a power-on condition, this pin is driven low by the device. An external circuit may also drive this pin to assert a device reset. This pin is also driven low by the MCU when a watchdog reset occurs. During watchdog reset, the XRSn pin is driven low for the watchdog reset duration of 512 OSCCLK cycles. A resistor between 2.2 kΩ and 10 kΩ should be placed between XRSn and VDDIO. If a capacitor is placed between XRSn and VSS for noise filtering, it should be 100 nF or smaller. These values will allow the watchdog to properly drive the XRSn pin to VOL within 512 OSCCLK cycles when the watchdog reset is asserted. This pin is an open-drain output with an internal pullup. If this pin is driven by an external device, it should be done using an open-drain device.
POWER AND GROUND
VDD E8, E9, E12, F6, F12, G6, L11, L12 8, 11, 80, 84, 105, 119, 137, 153, 169 6, 8, 67, 71, 87, 98, 112, 123, 137 5, 6, 45, 49, 55, 66, 78, 95 1.2-V Digital Logic Power Pins. TI recommends placing a decoupling capacitor near each VDD pin with a minimum total capacitance of approximately 20 µF. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution.
VDDA K6, L6 27, 62 19, 54 14, 37 3.3-V Analog Power Pins. Place a minimum 2.2-µF decoupling capacitor to VSSA on each pin. Connect this pin to 3.3-V supply.
VDDIO E6, E7, E10, E11, F15, G12, H6, H12, J6, J12, K12, L8, L9, L10, L13, M10, M11 3, 12, 79, 81, 88, 98, 101, 107, 115, 120, 127, 138, 147, 152, 168 3, 9, 66, 68, 72, 81, 83, 95, 99, 106, 113, 118, 122, 136 3, 7, 44, 46, 52, 63, 67, 73, 79 3.3-V Digital I/O Power Pins. Place a minimum 0.1-µF decoupling capacitor on each pin. Connect this pin to 3.3-V supply.
VSS A1, A16, F7, F8, F9, F10, F11, G7, G8, G9, G10, G11, H7, H8, H9, H10, H11, J7, J8, J9, J10, J11, K8, K9, K10, K11, T16 PAD PAD PAD Digital Ground
VSSA K7, L7, T1 28, 61 20, 53 15, 36 Analog Ground
VSSOSC E15 122 101 69 Crystal oscillator (X1 and X2) ground pin. When using an external crystal, do not connect this pin to the board ground. Instead, connect it to the ground reference of the external crystal oscillator circuit. Connect this pin to board ground.