JAJSH99C September   2000  – September 2022 INA118

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 絶対最大定格
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Noise Performance
      2. 8.4.2 Input Common-Mode Range
      3. 8.4.3 Input Protection
  9. 9 アプリケーションと実装
    1. 9.1 アプリケーション情報
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting the Gain
        2. 9.2.2.2 Dynamic Performance
        3. 9.2.2.3 Offset Trimming
        4. 9.2.2.4 Input Bias Current Return Path
      3. 9.2.3 アプリケーション曲線
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Low-Voltage Operation
      2. 9.3.2 Single-Supply Operation
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

at TA = 25°C, VS = ±15 V, VCM = 0 V, and RL = 10 kΩ (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
INPUT
Offset voltage, RTIInitialTA = 25°CINA118PB, UB±10 ± 50 / G±50 ± 500 / GµV
INA118P, U±25 ±100 / G±125 ±1000 / G
vs TemperatureTA = –40°C to +85°CINA118PB, UB±0.2 ± 2 / G±0.5 ± 20 / GµV/°C
INA118P, U±0.2 ± 5 / G±1 ± 20 / G
vs Power supplyVS = ±2.25 V to ±18 VINA118PB, UB±1 ±10 / G±5 ± 100 / GµV/V
INA118P, U±1 ±10 / G±10 ±100 / G
Long-term stability±0.4 ±5 / GµV/mo
ImpedanceDifferential1010 || 1Ω || pF
Common-mode1010 || 4
Linear input voltage(V+) – 2(V+) – 1.4V
(V–) + 2(V–) + 1.2
Safe input voltage±40V
Common-mode rejectionVCM = ±10 V, ΔRS = 1 kΩ, G = 1INA118PB, UB8090dB
INA118P, U7390
VCM = ±10 V, ΔRS = 1 kΩ, G = 10INA118PB, UB97110
INA118P, U89110
VCM = ±10 V, ΔRS = 1 kΩ, G = 100INA118PB, UB107120
INA118P, U98120
VCM = ±10 V, ΔRS = 1 kΩ, G = 1000INA118PB, UB110125
INA118P, U100125
Bias currentINA118PB, UB±1±5nA
INA118P, U±1±10
Bias current driftTA = –40°C to +85°C±40pA/°C
Offset currentINA118PB, UB±1±5nA
INA118P, U±1±10
Offset current driftTA = –40°C to +85°C±40pA/°C
Noise voltage, RTIG = 1000, RS = 0 Ω f = 10 Hz11nV/√Hz
f = 100 Hz10nV/√Hz
f = 1 kHz10nV/√Hz
fB = 0.1 Hz to 10 Hz0.28µVp-p
Noise current f = 10 Hz2pA/√Hz
f = 1 kHz0.3
fB = 0.1 Hz to 10 Hz80pAp-p
GAIN
Gain equation1 + (50 kΩ / RG)V/V
Gain110000V/V
Gain errorG = 1±0.01%±0.024%
G = 10±0.02%±0.4%
G = 100±0.05%±0.5%
G = 1000±0.5%±1%
Gain driftG = 1, TA = –40°C to +85°C±1±10ppm/°C
50-kΩ resistance drift(1)TA = –40°C to +85°C±25±100ppm/°C
NonlinearityG = 1±0.0003±0.001% of FSR
G = 10±0.0005±0.002
G = 100±0.0005±0.002
G = 1000±0.002±0.01
OUTPUT
Voltage:PositiveRL = 10 kΩ(V+) – 1(V+) – 0.8V
Negative RL = 10 kΩ(V–) + 0.35(V–) + 0.2
Single supply highV+ = 4.5 V, V– = 0 V(2), RL = 10 kΩ1.82
Single supply low V+ = 4.5 V, V– = 0 V(2), RL = 10 kΩ6035mV
Load capacitance stability1000pF
Short circuit current+5/–12mA
FREQUENCY RESPONSE
Bandwidth, –3 dBG = 1800kHz
G = 10500
G = 10070
G = 10007
Slew rateVO = ±10 V, G = 100.9V/µs
Settling time, 0.01%G = 115µs
G = 1015
G = 10021
G = 1000210
Overload recovery50% overdrive20µs
POWER SUPPLY
CurrentVIN = 0 V±350±385µA
(1) Temperature coefficient of the 50-kΩ term in the gain equation.
(2) Common-mode input voltage range is limited. See text for discussion of low power supply and single power supply operation.