JAJSCS8B December   2016  – November 2018 INA1650 , INA1651

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
    1.     INA165xの簡略化された内部回路図
  3. 3 概要
    1.     CMRRヒストグラム(5746チャネル)
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics:
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Audio Signal Path
      2. 7.3.2 Supply Divider
      3. 7.3.3 Electrical Overstress
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Single-Supply Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input Common-Mode Range
      2. 8.1.2 Common-Mode Input Impedance
      3. 8.1.3 Start-Up Time in Single-Supply Applications
      4. 8.1.4 Input AC Coupling
      5. 8.1.5 Supply Divider Capacitive Loading
    2. 8.2 Typical Applications
      1. 8.2.1 Line Receiver for Differential Audio Signals in a Split-Supply System
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Differential Line Receiver for Single-Supply Applications
      3. 8.2.3 Floating Single-Ended Input Line Receiver for Ground Loop Noise Reduction
      4. 8.2.4 Floating Single-Ended Input Line Receiver With Differential Outputs
      5. 8.2.5 TRS Audio Interface in Single-Supply Applications
      6. 8.2.6 Differential Line Driver With Single-Ended Input
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 TINA-TI(無料のダウンロード・ソフトウェア)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 関連リンク
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 コミュニティ・リソース
    6. 11.6 商標
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

INA1650 PW Package
14-Pin TSSOP
Top View
INA1650 INA1651 INA1650_PINOUT.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
COM A 3 I Input common, channel A
COM B 6 I Input common, channel B
IN+ A 2 I Noninverting input, channel A
IN– A 4 I Inverting input, channel A
IN+ B 7 I Noninverting input, channel B
IN– B 5 I Inverting input, channel B
OUT A 13 O Output, channel A
OUT B 8 O Output, channel B
REF A 12 I Reference input, channel A. This pin must be driven from a low impedance.
REF B 9 I Reference input, channel B. This pin must be driven from a low impedance.
VCC 1 — Positive (highest) power supply
VEE 14 — Negative (lowest) power supply
VMID(IN) 11 I Input node of internal supply divider. Connect a capacitor to this pin to reduce noise from the supply divider circuit.
VMID(OUT) 10 O Buffered output of internal supply divider.
INA1651 PW Package
14-Pin TSSOP
Top View
INA1650 INA1651 INA1651_Pinout.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
COM A 3 I Input common, channel A
IN+ A 2 I Noninverting input, channel A
IN– A 4 I Inverting input, channel A
NC 5 — No internal connection
NC 6 — No internal connection
NC 7 — No internal connection
NC 8 — No internal connection
NC 9 — No internal connection
OUT A 13 O Output, channel A
REF A 12 I Reference input, channel A. This pin must be driven from a low impedance.
VCC 1 — Positive (highest) power supply
VEE 14 — Negative (lowest) power supply
VMID(IN) 11 I Input node of internal supply divider. Connect a capacitor to this pin to reduce noise from the supply divider circuit.
VMID(OUT) 10 O Buffered output of internal supply divider.