JAJSR73 February   2024 INA185-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 High Bandwidth and Slew Rate
      2. 6.3.2 Bidirectional Current Monitoring
      3. 6.3.3 Wide Input Common-Mode Voltage Range
      4. 6.3.4 Precise Low-Side Current Sensing
      5. 6.3.5 Rail-to-Rail Output Swing
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Mode
      2. 6.4.2 Unidirectional Mode
      3. 6.4.3 Bidirectional Mode
      4. 6.4.4 Input Differential Overload
      5. 6.4.5 Shutdown Mode
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Connections
      2. 7.1.2 RSENSE and Device Gain Selection
      3. 7.1.3 Signal Filtering
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Common-Mode Transients Greater Than 26V
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Shutdown Mode

Although the INA185-Q1 does not have a shutdown pin, the low power consumption of these devices allows the output of a logic gate or transistor switch to power the INA185-Q1. This gate or switch turns on and off the INA185-Q1 power-supply quiescent current.

However, in current shunt monitoring applications, the amount of current drained from the shunt circuit in shutdown conditions is also a concern. Evaluating this current drain involves considering the simplified schematic of the INA185-Q1 in shutdown mode, as shown in Figure 6-4.

GUID-20240221-SS0I-CZH0-PL4D-HDN3GJSHM8Z2-low.svg Figure 6-4 Basic Circuit to Shut Down the INA185-Q1 With a Grounded Reference

There is typically more than 500kΩ of impedance (from the combination of 500kΩ feedback and
input gain set resistors) from each input of the INA185-Q1 to the OUT pin and to the REF pin. The amount of current flowing through these pins depends on the voltage at the connection. For example, if the REF pin is grounded, the calculation of the effect of the 500kΩ impedance from the shunt to ground is straightforward. However, if the reference is powered while the INA185-Q1 is in shutdown mode, the input current is determined by the 500kΩ impedance and the voltage difference between the positive input and the voltage applied to the REF pin.

Regarding the 500kΩ path to the output pin, the output stage of a disabled INA185-Q1 does constitute a good path to ground. Consequently, this current is directly proportional to a shunt common-mode voltage present across a 500kΩ resistor.

As long as the shunt common-mode voltage is greater than VS when the device is powered up, there is an additional and well-matched 55µA typical current that flows in each of the inputs. If less than VS, the common-mode input currents are negligible, and the only current effects are the result of the 500kΩ resistors.