8.3.1 Output Voltage Range

The output of the INA206, INA207, and INA208 is accurate within the output voltage swing range set by the power supply pin, V_s. This performance is best illustrated when using the INA208 (a gain of 100 version), where a 100-mV full-scale input from the shunt resistor requires an output voltage swing of 10 V, and a power-supply voltage sufficient to achieve 10 V on the output.

8.3.2 Reference

The INA206, INA207, and INA208 include an internal voltage reference that has a load regulation of 0.4 mV/mA (typical), and not more than 100 ppm/°C of drift. Only the 14-pin package allows external access to reference voltages, where voltages of 1.2 V and 0.6 V are both available. Output current versus output voltage is illustrated in Typical Characteristics.

8.3.3 Comparator

The INA206, INA207, and INA208 devices incorporate two open-drain comparators. These comparators typically have 2 mV of offset and a 1.3-µs (typical) response time. The output of Comparator 1 latches and is reset through the CMP1 RESET pin, as shown in Figure 31. This configuration applies to both the 10- and 14-pin versions. Figure 30 illustrates the comparator delay.

The 14-pin versions of the INA206, INA207, and INA208 include additional features for comparator functions. The comparator reference voltage of both Comparator 1 and Comparator 2 can be overridden by external inputs for increased design flexibility. Comparator 2 has a programmable delay.

Figure 30. Simplified Model of the Comparator 2 Delay Circuit

Figure 31. Comparator 1 Latching Capability

8.3.4 Comparator Delay (14-Pin Version Only)

The Comparator 2 programmable delay is controlled by a capacitor connected to the CMP2 Delay Pin; see Figure 40. The capacitor value (in µF) is selected by using Equation 1.

Equation 1.

A simplified version of the delay circuit for Comparator 2 is shown in Figure 30. The delay comparator consists of two comparator stages with the delay between them. Note that I1 and I2 cannot be turned on simultaneously; I1 corresponds to a U1 low output and I2 corresponds to a U1 high output. Using an initial assumption that the U1 output is low, I1 is on, then U2 +IN is zero. If U1 goes high, I2 supplies 120 nA to C_DELAY. The voltage at U2 +IN begins to ramp toward a 0.6-V threshold. When the voltage crosses this threshold, the U2 output goes high while the voltage at U2 +IN continues to ramp up to a maximum of 1.2 V when given sufficient time (twice the value of the delay specified for C_DELAY). This entire sequence is reversed when the comparator outputs go low, so that returning to low exhibits the same delay.

Figure 32. Server 12-V Supply Current Monitor

It is important to note what will happen if events occur more rapidly than the delay timeout; for example, when the U1 output goes high (turning on I2), but returns low (turning I1 back on) prior to reaching the 0.6-V transition for U2. The voltage at U2 +IN ramps back down at a rate determined by the value of C_DELAY, and only returns to zero if given sufficient time.

In essence, when analyzing Comparator 2 for behavior with events more rapid than its delay setting, use the model shown in Figure 30.

8.3.5 Comparator Maximum Input Voltage Range

The maximum voltage at the comparator input for normal operation is up to (V_s) – 1.5 V. There are special considerations when overdriving the reference inputs (pins 3 and 6). Driving either or both inputs high enough to drive 1 mA back into the reference introduces errors into the reference. Figure 33 shows the basic input structure. A general guideline is to limit the voltage on both inputs to a total of 20 V. The exact limit depends on the available voltage and whether either or both inputs are subject to the large voltage. When making this determination, consider the 20 kΩ from each input back to the comparator. Figure 34 shows the maximum input voltage that avoids creating a reference error when driving both inputs (an equivalent resistance back into the reference of 10 kΩ.

Figure 33. Limit Current Into Reference ≤ 1 mA

Figure 34. Overdriving Comparator Inputs Without Generating a Reference Error

Figure 35. PWM Output Current-Shunt Monitor

Figure 36. Bi-Directional Current Comparator

Figure 37. Analog Output Current-Shunt Monitor With Comparators Used as Power-Supply Under-Limit or Over-Limit or Power-Good Detector

8.4.1 Accuracy Variations as a Result of V_SENSE and Common-Mode Voltage

The accuracy of the INA206, INA207, and INA208 current-shunt monitors is a function of two main variables: V_SENSE (V_IN+ – V_IN–) and common-mode voltage, V_CM, relative to the supply voltage, V_S. V_CM is expressed as (V_IN+ + V_IN–)/2; however, in practice, V_CM is seen as the voltage at V_IN+ because the voltage drop across V_SENSE is usually small.

This section addresses the accuracy of these specific operating regions:

• Normal Case 1: V_SENSE ≥ 20 mV, V_CM ≥ V_S
• Normal Case 2: V_SENSE ≥ 20 mV, V_CM < V_S
• Low V_SENSE Case 1: V_SENSE < 20 mV, –16 V ≤ V_CM < 0
• Low V_SENSE Case 2: V_SENSE < 20 mV, 0 V ≤ V_CM ≤ V_S
• Low V_SENSE Case 3: V_SENSE < 20 mV, V_S < V_CM ≤ 80 V

8.4.1.1 Normal Case 1: V_SENSE ≥ 20 mV, V_CM ≥ V_S

This region of operation provides the highest accuracy. Here, the input offset voltage is characterized and measured using a two-step method. First, the gain is determined by Equation 2.

Equation 2.

where

• V_OUT1 = Output Voltage with V_SENSE = 100 mV
• V_OUT2 = Output Voltage with V_SENSE = 20 mV

Then the offset voltage is measured at V_SENSE = 100 mV and referred to the input (RTI) of the current-shunt monitor, as shown in Equation 3

Equation 3.

In the Typical Characteristics, the Output Error vs Common-Mode Voltage curve shows the highest accuracy for this region of operation. In this plot, V_S = 12 V; for V_CM ≥ 12 V, the output error is at its minimum. This case is also used to create the V_SENSE ≥ 20-mV output specifications in Electrical Characteristics: Current-Shunt Monitor through Electrical Characteristics: General.

8.4.1.2 Normal Case 2: V_SENSE ≥ 20 mV, V_CM < V_S

This region of operation has slightly less accuracy than Normal Case 1 as a result of the common-mode operating area in which the part functions, as seen in the Output Error vs Common-mode Voltage curve. As noted, for this graph V_S = 12 V; for V_CM < 12 V, the Output Error increases as V_CM becomes less than 12 V, with a typical maximum error of 0.005% at the most negative V_CM = –16 V.

Low VSENSE Case 1:	VSENSE < 20 mV, –16 V ≤ VCM < 0; and
Low VSENSE Case 3:	VSENSE < 20 mV, VS < VCM ≤ 80 V

Although the INA206 family of devices are not designed for accurate operation in either of these regions, some applications are exposed to these conditions; for example, when monitoring power supplies that are switched on and off while V_S is still applied to the INA206, INA207, or INA208. It is important to know what the behavior of the devices will be in these regions.

As V_SENSE approaches 0 mV, in these V_CM regions, the device output accuracy degrades. A larger-than-normal offset can appear at the currenrt-shunt monitor output with a typical maximum value of V_OUT = 300 mV for V_SENSE = 0 mV. As V_SENSE approaches 20 mV, V_OUT Returns to the expected output value with accuracy as specified in Electrical Characteristics: Current-Shunt Monitor through Electrical Characteristics: General. Figure 38 illustrates this effect using the INA208 (Gain = 100).

Figure 38. Example for Low V_SENSE Cases 1 and 3 (INA208, Gain = 100)

8.4.1.3 Low V_SENSE Case 2: V_SENSE < 20mV, 0V ≤ V_CM ≤ V_S

This region of operation is the least accurate for the INA206 family. To achieve the wide input common-mode voltage range, these devices use two op amp front ends in parallel. One op amp front end operates in the positive input common-mode voltage range, and the other in the negative input region. For this case, neither of these two internal amplifiers dominates and overall loop gain is very low. Within this region, V_OUT approaches voltages close to linear operation levels for Normal Case 2. This deviation from linear operation becomes greatest the closer V_SENSE approaches 0 V. Within this region, as V_SENSE approaches 20 mV, device operation is closer o that described by Normal Case 2. Figure 39 illustrates this behavior for the INA208. The V_OUT maximum peak for this case is tested by maintaining a constant VS, setting V_SENSE = 0 mV and sweeping V_CM from 0 V to VS. The exact V_CM at which V_OUT peaks during this test varies from part to part, but the V_OUT maximum peak is tested to be less than the specified V_OUT Tested Limit.

Figure 39. Example for Low V_SENSE Case 2 (INA208, Gain = 100)