JAJSN53A February 2012 – December 2021 INA230
PRODUCTION DATA
The INA230 is designed to respond to the SMBus alert response address. The SMBus alert response provides a quick fault identification for simple target devices. When an alert occurs, the controller can broadcast the alert response target address (0001 100) with the Read/Write bit set high. Following this alert response, any target devices that generated an alert identify themselves by acknowledging the alert response and sending their respective address on the bus.
The alert response can activate several different target devices simultaneously, similar to the I2C general call. If more than one target attempts to respond, bus arbitration rules apply. The losing device does not generate an acknowledge and continues to hold the ALERT line low until the interrupt is cleared.