JAJSIY5C July   2016  – September 2023 INA250-Q1

PRODUCTION DATA  

1.   1
2. 1 特長
3. 2 アプリケーション
4. 3 概要
5. 4 Revision History
6. 5 Pin Configuration and Functions
7. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings
   3. 6.3 Recommended Operating Conditions
   4. 6.4 Thermal Information
   5. 6.5 Electrical Characteristics
   6. 6.6 Typical Characteristics
8. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Feature Description
      1. 7.3.1 Integrated Shunt Resistor
      2. 7.3.2 Short-Circuit Duration
      3. 7.3.3 Temperature Stability
   4. 7.4 Device Functional Modes
      1. 7.4.1 Amplifier Operation
      2. 7.4.2 Input Filtering
         1. 7.4.2.1 Calculating Gain Error Resulting from External Filter Resistance
      3. 7.4.3 Shutting Down the Device
      4. 7.4.4 Using the Device with Common-Mode Transients Above 36 V
9. 8 Applications and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Applications
      1. 8.2.1 Current Summing
         1. 8.2.1.1 Design Requirements
         2. 8.2.1.2 Detailed Design Procedure
         3. 8.2.1.3 Application Curve
      2. 8.2.2 Parallel Multiple INA250-Q1 Devices for Higher Current
         1. 8.2.2.1 Design Requirements
         2. 8.2.2.2 Detailed Design Procedure
         3. 8.2.2.3 Application Curve
      3. 8.2.3 Current Differencing
         1. 8.2.3.1 Design Requirements
         2. 8.2.3.2 Detailed Design Procedure
         3. 8.2.3.3 Application Curve
   3. 8.3 Power Supply Recommendations
   4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
       1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
11. 10Mechanical, Packaging, and Orderable Information