JAJSQ71 may   2023 INA310A-Q1 , INA310B-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Amplifier Input Common-Mode Signal
      2. 7.3.2  Input-Signal Bandwidth
      3. 7.3.3  Low Input Bias Current
      4. 7.3.4  Low VSENSE Operation
      5. 7.3.5  Wide Fixed Gain Output
      6. 7.3.6  Wide Supply Range
      7. 7.3.7  Integrated Comparator
      8. 7.3.8  RESET Function
      9. 7.3.9  Short Propagation Delay
      10. 7.3.10 Comparator Input Bias Current
    4. 7.4 Device Functional Modes
      1. 7.4.1 Basic Connections
        1. 7.4.1.1 Overcurrent Threshold Connection
      2. 7.4.2 High-Side Switch Overcurrent Shutdown
      3. 7.4.3 Bidirectional Overcurrent Comparator
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 RSENSE and Device Gain Selection
    2. 8.2 Typical Application
      1. 8.2.1 Current Sensing in a Solenoid Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Overload Recovery With Negative VSENSE
        4. 8.2.1.4 Application Curve
      2. 8.2.2 Low-Side Switch Overcurrent Shutdown
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Decoupling
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

at TA = 25°C, VSENSE = VIN+ – VIN– = 0.5 V / Gain, VS = 5.0 V, VCM = VIN– = 48 V,  and RPULLUP= 5.1 kΩ connected from CMPout to Vs, (unless otherwise noted)
PARAMETER CONDITIONS MIN TYP MAX UNIT
INPUT
VCM Common-mode input range TA = –40°C to +125°C –4 110 V
CMRR Common-mode rejection ratio  INA310Ax-Q1, VIN+ = –4 V to 110 V, TA = –40°C to +125°C 140 160 dB
INA310Ax-Q1, f = 50 kHz 85
INA310Bx-Q1, VIN+ = –4 V to 110 V, TA = –40°C to +125°C 120 140
INA310Bx-Q1, f = 50 kHz 65
VOS Offset voltage, RTI(1) INA310A1-Q1 ±30 ±150 µV
INA310B1-Q1 ±100 ±500
INA310A2-Q1 ±15 ±80
INA310B2-Q1 ±55 ±300
INA310A3-Q1 ±10 ±50
INA310B3-Q1 ±30 ±250
INA310A4-Q1 ±5 ±30
INA310B4-Q1 ±30 ±200
INA310A5-Q1 ±2 ±20
INA310B5-Q1 ±15 ±150
dVOS/dT Offset drift, RTI TA = –40°C to +125°C, INA310A1-Q1, INA310A2-Q1, INA310A3-Q1 ±0.05 ±0.5 µV/°C
TA = –40°C to +125°C, INA310A4-Q1, INA310A5-Q1 ±0.025 ±0.25
TA = –40°C to +125°C, INA310Bx-Q1 ±0.1 ±1
PSRR Power-supply rejection ratio, RTI INA310A1-Q1, 2.7 V ≤ VS ≤ 20 V, TA = –40°C to +125°C ±1 ±8 µV/V
INA310A2-Q1, INA310A3-Q1, 2.7 V ≤ VS ≤ 20 V,
TA = –40°C to +125°C		 ±0.3 ±3
INA310A4-Q1, INA310A5-Q1, 2.7 V ≤ VS ≤ 20 V,
TA = –40°C to +125°C		 ±0.1 ±1
INA310Bx-Q1 2.7 V ≤ VS ≤ 20 V, TA = –40°C to +125°C ±1.5 ±10
IB Input bias current IB+, IB-, VSENSE = 0 mV 10 20 30 µA
OUTPUT
G Gain INA310A1-Q1, INA310B1-Q1 20 V/V
INA310A2-Q1, INA310B2-Q1 50
INA310A3-Q1, INA310B3-Q1 100
INA310A4-Q1, INA310B4-Q1 200
INA310A5-Q1, INA310B5-Q1 500
GERR Gain error INA310Ax-Q1, GND + 50 mV ≤ VOUT ≤ VS – 200 mV ±0.02% ±0.15%
INA310Bx-Q1, GND + 50 mV ≤ VOUT ≤ VS – 200 mV ±0.07% ±0.5%
INA310Ax-Q1, TA = –40°C to +125°C 1 10 ppm/°C
INA310Bx-Q1, TA = –40°C to +125°C 2 20
NLERR Nonlinearity error GND + 50 mV ≤ VOUT ≤ VS – 200 mV ±0.01 %
Maximum capacitive load No sustained oscillation, no isolation resistor 500 pF
VOLTAGE OUTPUT
VSP Swing to VS (Power-supply rail) RLOAD = 10 kΩ to GND, TA = –40°C to +125°C (VS) – 70 (VS) – 150 mV
VSN Swing to GND RLOAD = 10 kΩ to GND, TA = –40°C to +125°C,
VSENSE = 0 mV		 (VGND) + 5 (VGND) + 20 mV
FREQUENCY RESPONSE
BW Bandwidth INA310A1-Q1, INA310B1-Q1, CLOAD = 5 pF, VSENSE = 200mV 1300 kHz
INA310A2-Q1, INA310B2-Q1, CLOAD = 5 pF, VSENSE = 80mV 1300
INA310A3-Q1, INA310B3-Q1, CLOAD = 5 pF, VSENSE = 40mV 1000
INA310A4-Q1, INA310B4-Q1, CLOAD = 5 pF, VSENSE = 20mV 900
INA310A5-Q1, INA310B5-Q1, CLOAD = 5 pF, VSENSE = 8mV 900
SR Slew rate Rising edge 2.5 V/µs
tS Settling time VOUT = 4 V ± 0.1 V step, Output settles to 0.5% 10 µs
VOUT = 4 V ± 0.1 V step, Output settles to 1% 5 µs
VOUT = 4 V ± 0.1 V step, Output settles to 5% 1 µs
NOISE
Ven Voltage noise density 50 nV/√Hz
COMPARATOR
VTHRESHOLD Alert threshold TA = 25°C 585 600 615 mV
TA = –40°C to +125°C 580 620 mV
Hysteresis TA = 25°C 8 mV
tP Small-signal propagation delay Comparator input overdrive = 20 mV 1 µs
Slew-rate-limited propagation delay VOUT step = 0.5 V to 4.5 V, VLIMIT (3) = 4 V 1.6 µs
IBCMPIN Input bias current, CMPin PIN TA = 25°C, VCMPIN = 0.4 V to 1.2 V -20 1 20 nA
TA = –40°C to +125°C, VCMPIN = 0.4 V to 1.2 V 250 nA
ILKG High-level leakage current VCMPout = VS 1 µA
VOL Low-level output voltage IOL = 2.35 mA 300 mV
TA = –40°C to +125°C, IOL = 2.35 mA 350 mV
VIH RESET High-level input voltage threshold (2) TA = –40°C to +125°C
1.2
 		 V
VIL RESET Low-level input voltage threshold (2) TA = –40°C to +125°C 0.4 V
Minimum RESET pulse width TA = –40°C to +125°C 100 200 ns
RESET propagation delay 250 ns
POWER SUPPLY
VS Supply voltage range TA = –40°C to +125°C 2.7 20 V
IQ Quiescent current 1.6 2 mA
TA = –40°C to +125°C 2.25 mA
(1) RTI = referred-to-input.
(2) The RESET input has an internal 2 MΩ (typical) pulldown. Leaving RESET open results in a LOW state, with transparent comparator operation. 
(3) VLIMIT is VOUT at the overcurrent threshold set by external resistors.