JAJSPA2D December   2022  – November 2024 INA351

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gain-Setting
        1. 7.3.1.1 Gain Error and Drift
      2. 7.3.2 Input Common-Mode Voltage Range
      3. 7.3.3 EMI Rejection
      4. 7.3.4 Typical Specifications and Distributions
      5. 7.3.5 Electrical Overstress
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Reference Pin
      2. 8.1.2 Input Bias Current Return Path
    2. 8.2 Typical Applications
      1. 8.2.1 Resistive-Bridge Pressure Sensor
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

INA351 DDF Package,8-Pin SOT-23(Top View)Figure 5-1 DDF Package,
8-Pin SOT-23
(Top View)
INA351 DSG Package,8-Pin WSON With Exposed Thermal Pad(Top View)
Note: Connect Thermal Pad to (V−)
Figure 5-2 DSG Package,
8-Pin WSON With Exposed Thermal Pad
(Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
IN– 2 I Negative (inverting) input
IN+ 3 O Positive (noninverting) input
OUT 6 — Output
REF 5 — Reference input. This pin internally connects to a reference buffer amplifier in G = 1, unity gain follower configuration.
GS 1 I

Gain select – logic low (G = 10 for INA351ABS and G = 30 for INA351CDS)

Gain select – logic high (G = 20 for INA351ABS and G = 50 for INA351CDS)

Gain select – no connect (G = 20 for INA351ABS and G = 50 for INA351CDS)
SHDN 8 I

Shutdown – logic high (device enabled)

Shutdown – logic low (device disabled)

Shutdown – no connect (device enabled)
V– 4 — Negative supply
V+ 7 — Positive supply
(1) I = input, O = output
INA351 RUG Package,10-Pin X2QFN(Top View) Figure 5-3 RUG Package,
10-Pin X2QFN
(Top View)
Table 5-2 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
IN– 2 I Negative (inverting) input
IN+ 3 O Positive (noninverting) input
OUT 7 — Output
REF 6 — Reference input. This pin internally connects to a reference buffer amplifier in G = 1, unity gain follower configuration.
GS 1 I

Gain select – logic low (G = 10 for INA351ABS and G = 30 for INA351CDS)

Gain select – logic high (G = 20 for INA351ABS and G = 50 for INA351CDS)

Gain select – no connect (G = 20 for INA351ABS and G = 50 for INA351CDS)
SHDN 9 I

Shutdown – logic high (device enabled)

Shutdown – logic low (device disabled)

Shutdown – no connect (device enabled)
V– 4 — Negative supply
V+ 8 — Positive supply
NC 5, 10 — No connect
(1) I = input, O = output