JAJSSK7B December   2023  – March 2024 INA500

PRODMIX  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - INA500A
    6. 6.6 Electrical Characteristics - INA500B
    7. 6.7 Electrical Characteristics - INA500C
    8. 6.8 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gain Options and Resistors
        1. 7.3.1.1 Gain Error and Drift
      2. 7.3.2 Input Common-Mode Voltage Range
      3. 7.3.3 EMI Rejection
      4. 7.3.4 Typical Specifications and Distributions
      5. 7.3.5 Electrical Overstress
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Reference Pin
    2. 8.2 Typical Applications
      1. 8.2.1 Battery Monitoring using Difference Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DBV|6
  • DCK|6
サーマルパッド・メカニカル・データ
発注情報

Electrical Overstress

Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. These questions tend to focus on the device inputs, but can involve the supply voltage pins or even the output pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin. Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events both before and during product assembly.

Having a good understanding of this basic ESD circuitry and the relevance to an electrical overstress event is helpful. Figure 7-7 shows the ESD circuits contained in the INA500 devices. On the input pins, the ESD protection circuitry involves local high impedance diode structures and do not route the ESD current to power supply ESD cell. On the output pin, there are reverse biased diodes to both the power supply rails. These diode structures route the ESD current back to the internal power supply lines, where there is an absorption power supply ESD cell internal to the difference amplifier. On the reference pin, the ESD protection is local and does not route current to the power supply ESD cell.

All of the ESD protection circuitry is intended to remain inactive during normal circuit operation.

GUID-20231214-SS0I-9WV1-GLQR-W7WCTPKZNT0D-low.svg Figure 7-7 Equivalent Internal ESD Circuitry