SBOSAE5 December   2024 INA750B

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Integrated Shunt Resistor
      2. 6.3.2 Safe Operating Area
      3. 6.3.3 Short-Circuit Duration
      4. 6.3.4 Temperature Drift Correction
      5. 6.3.5 Enhanced PWM Rejection Operation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Adjusting the Output With the Reference Pin
        1. 6.4.1.1 Reference Pin Connections for Unidirectional Current Measurements
        2. 6.4.1.2 Ground Referenced Output
        3. 6.4.1.3 Reference Pin Connections for Bidirectional Current Measurements
        4. 6.4.1.4 Output Set to Mid-Supply Voltage
      2. 6.4.2 Adjustable Gain Set Using External Resistors
        1. 6.4.2.1 Adjustable Unity Gain
      3. 6.4.3 Thermal Alert Function
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Calculating Total Error
        1. 7.1.1.1 Error Sources
        2. 7.1.1.2 Reference Voltage Rejection Ratio Error
        3. 7.1.1.3 External Adjustable Gain Error
        4. 7.1.1.4 Total Error Example 1
        5. 7.1.1.5 Total Error Example 2
        6. 7.1.1.6 Total Error Example 3
        7. 7.1.1.7 Total Error Curves
    2. 7.2 Signal Filtering
    3. 7.3 Typical Application
      1. 7.3.1 High-Side, High-Drive, Solenoid Current-Sense Application
        1. 7.3.1.1 Design Requirements
        2. 7.3.1.2 Detailed Design Procedure
        3. 7.3.1.3 Application Curve
      2. 7.3.2 Speaker Enhancements and Diagnostics Using Current Sense Amplifier
        1. 7.3.2.1 Design Requirements
        2. 7.3.2.2 Detailed Design Procedure
        3. 7.3.2.3 Application Curves
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Integrated Shunt Resistor

The INA750x features an integrated EZShunt™ technology current-sensing resistor that provides accurate measurements over the entire specified temperature range of –40°C to +125°C. The integrated current-sensing resistor provides measurement stability over temperature, and simplifies printed circuit board (PCB) layout and board constraint difficulties common in high-precision measurements.

The onboard current-sensing resistor is designed as a 4-wire (or Kelvin) connected resistor that enables accurate measurements through a force-sense connection. Internally connected amplifier input pins (IN– and IN+) to the sense pins of the shunt resistor eliminates many instances of parasitic impedance commonly found in typical very-low sensing-resistor level measurements. The INA750x is system-calibrated to make sure that the current-sensing resistor and current-sensing amplifier are both precisely matched to one another. The in-package integrated sensing resistor must be used with the internal current-sensing amplifier to achieve the optimized system gain specification.

The INA750x has approximately 1mΩ of package resistance. Of this total package resistance, 800µΩ resistance from the Kelvin-connected current-sensing resistor is used by the amplifier. The power dissipation requirements of the system and package are based on the total 1mΩ package resistance between the IS+ and IS– pins.

INA750B IS+ to IS– Package Resistance vs
          Temperature Figure 6-1 IS+ to IS– Package Resistance vs Temperature