SBOS562G August   2011  – June 2020 INA826

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      General-Purpose Instrumentation Amplifier
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Inside the INA826
      2. 8.3.2  Setting the Gain
        1. 8.3.2.1 Gain Drift
      3. 8.3.3  Offset Trimming
      4. 8.3.4  Input Common-Mode Range
      5. 8.3.5  Input Protection
      6. 8.3.6  Input Bias Current Return Path
      7. 8.3.7  Reference Terminal
      8. 8.3.8  Dynamic Performance
      9. 8.3.9  Operating Voltage
        1. 8.3.9.1 Low-Voltage Operation
      10. 8.3.10 Error Sources
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Circuit Breaker
      2. 9.3.2 Programmable Logic Controller (PLC) Input
      3. 9.3.3 Using TINA-TI SPICE-Based Analog Simulation Program With the INA826
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 CMRR vs Frequency
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.10 Error Sources

Most modern signal-conditioning systems calibrate errors at room temperature. However, calibration of errors that result from a change in temperature is normally difficult and costly. Therefore, minimizing these errors is important. Make sure to choose high-precision components, such as the INA826, that have improved specifications in critical areas that impact the precision of the overall system. Figure 62 shows an example application.

INA826 ai_err_calc_bos562.gifFigure 62. Example Application With G = 10 V/V and 1-V Differential Voltage

Resistor-adjustable INAs, such as the INA826, show the lowest gain error in G = 1 because of the inherently well-matched drift of the internal resistors of the differential amplifier. At gains greater than 1 (for instance, G = 10 V/V or G = 100 V/V), the gain error becomes a significant error source because of the contribution of the resistor drift of the 24.7-kΩ feedback resistors in conjunction with the external gain resistor. Except for very high gain applications, the gain drift is by far the largest error contributor compared to other drift errors, such as offset drift.

The INA826 offers excellent gain error over temperature for both G > 1 and G = 1 (no external gain resistor). Table 2 summarizes the major error sources in common INA applications and compares the two cases of G = 1 (no external resistor) and G = 10 (5.49-kΩ external resistor). As can be seen in Table 2, although the static errors (absolute accuracy errors) in G = 1 are almost twice as great as compared to G = 10, there are much fewer drift errors because of the much lower gain error drift. In most applications, these static errors can readily be removed during calibration in production. All calculations refer the error to the input for easy comparison and system evaluation.

Table 2. Error Calculations

ERROR SOURCE ERROR CALCULATION INA826
SPECIFICATION G = 10 ERROR (ppm) G = 1 ERROR (ppm)
ABSOLUTE ACCURACY AT 25°C
Input offset voltage (µV) VOSI / VDIFF 150 150 150
Output offset voltage (µV) VOSO / (G × VDIFF) 700 70 700
Input offset current (nA) IOS × maximum (RS+, RS–) / VDIFF 5 50 50
CMRR (dB) VCM / (10CMRR/20 × VDIFF) 104 (G = 10),
84 (G = 1)		 63 631
Total absolute accuracy error (ppm) 333 1531
DRIFT TO 105°C
Gain drift (ppm/°C) GTC × (TA – 25) 35 (G = 10),
1 (G = 1)		 2800 80
Input offset voltage drift (µV/°C) (VOSI_TC / VDIFF) × (TA – 25) 2 160 160
Output offset voltage drift (µV/°C) [VOSO_TC / ( G × VDIFF)] × (TA – 25) 10 80 800
Offset current drift (pA/°C) IOS_TC × maximum (RS+, RS–) ×
(TA – 25) / VDIFF 		60 48 48
Total drift error (ppm) 3088 1088
RESOLUTION
Gain nonlinearity (ppm of FS) 5 5 5
Voltage noise (1 kHz) INA826 q_err_calc_volt_noise_bos562.gif eNI = 18,
eNO = 110		 10 10
Total resolution error (ppm) 15 15
TOTAL ERROR
Total error Total error = sum of all error sources 3436 2634