JAJSOA9A March   2022  – October 2022 INA851

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 説明
  4. 4 Revision History
  5. 5 Related Products
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Adjustable Gain Setting
        1. 8.3.1.1 Gain Drift
      2. 8.3.2 Offset Voltage
      3. 8.3.3 Input Common-Mode Range
      4. 8.3.4 Input Protection
      5. 8.3.5 Output Clamping
      6. 8.3.6 Low Noise
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Common-Mode Pin
      2. 9.1.2 Output-Stage Gain Selection and Noise-Gain Shaping
      3. 9.1.3 Input Bias Current Return Path
      4. 9.1.4 Thermal Effects due to Power Dissipation
    2. 9.2 Typical Applications
      1. 9.2.1 Three-Pin Programmable Logic Controller (PLC)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 アプリケーション曲線
      2. 9.2.2 20-Bit, 1-MSPS ADS8900B Driver Circuit With FDA Noise Filter
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Application Curves
      3. 9.2.3 24-Bit, 200 kSPS, Delta-Sigma ADS127L11 ADC Driver Circuit With FDA Noise Filter
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
        2. 10.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.1.2 Detailed Design Procedure

There are two modes of operation for the circuit shown in Figure 9-3: current input and voltage input. This design requires R1 >> R2 >> R3. Given this relationship, the following equation calculates the current input mode transfer function.

Equation 6. VOUT=VDIFF×G= -(IIN×R3)

where

  • VOUT represents the differential voltage at the INA851 outputs in current input mode.
  • VDIFF represents the differential voltage at the INA851 inputs.
  • G represents the total gain of the INA851
  • IIN is the input current to the PLC.

The following equation shows the transfer function for the voltage input mode:

Equation 7. V O U T = V D I F F × G =   – V I N   ×   R 2 R 2 + R 1

where

  • VOUT represents the differential voltage at the INA851 outputs in voltage input mode.
  • VIN is the input voltage to the PLC.

The voltages on the output pins of the INA851 follow the relationships in Equation 8 and Equation 9.

Equation 8. VOUT+= VDIFF×G2 + VOCM
Equation 9. VOUT-=-VDIFF×G2 + VOCM

R1 sets the input impedance of the voltage input mode. The minimum typical input impedance is 100 kΩ. The R1 value is 100 kΩ because increasing the R1 value also increases noise. The value of R3 must be extremely small compared to R1 and R2. A 20‑Ω value is selected for R3 because that resistance value is much smaller than R1 and yields an input voltage of ±400 mV when operated in current mode (±20 mA).

Use Equation 10 to calculate R2 given VDIFF = ±400 mV, VIN = ±10 V, and R1 = 100 kΩ.

Equation 10. V D I F F = V I N × R 2 R 1 + R 2 → R 2 = R 1 × V D I F F V I N − V D I F F = 4.167   k Ω

The value obtained from Equation 10 is not a standard 0.1% value; therefore, 4.17 kΩ is selected. R1 and R2 also use 0.1% tolerance resistors to minimize error.

Use Equation 11 to calculate the gain of the instrumentation amplifier.

Equation 11. G = V O U T V D I F F = 4.95   V 400   m V = 12.375   V/V

Equation 12 calculates the gain-setting resistor value using the INA851 gain equation for GOUT = 1 V/V (Equation 1).

Equation 12. R G = 6   k Ω G − 1 = 6   k Ω 12.375 − 1 = 527.473   Ω

Use a standard 0.1% resistor value of 530 Ω for this design.

The ADS8920B is selected because of the differential input, 1-MSPS sampling rate, and integrated reference buffer. Implement the antialiasing R-C-R filter using two 47.4-Ω resistors, a COG or NPO-type 510-pF differential capacitor, and two ceramic 51-pF common-mode capacitors. The REF5050 is selected to create a 5-V reference voltage for the ADC. Use well-matched precision resistors to create a voltage divider that generates a stable 2.5-V VOCM reference. Connect the VCLAMP+ and VCLAMP− pins of the INA851 to the supplies of the ADC to protect against overdrive damage in the event of a fault. Consider implementing a TVS diode from the ADC supply to GND for additional protection, and include 100-nF decoupling capacitors between the amplifier and ADC supplies and GND.