JAJSOA9A March 2022 – October 2022 INA851
PRODUCTION DATA
The stability and temperature drift of external gain setting resistor RG also affects gain. The contribution of RG to gain accuracy and drift is determined from Equation 1. The best gain drift of 5 ppm/℃ (maximum) is achieved when the INA851 uses G = 1 in the input stage, without RG connected. In this case, gain drift is limited by the mismatch of the temperature coefficient of the integrated resistors in fully differential amplifier A3. When the output stage is in attenuating gain mode (OUT− shorted to G02− and OUT+ shorted to G02+), both the 1.25-kΩ and the 5-kΩ resistors contribute mismatch, as do the traces between the G02x and OUTx pins. Only the 5-kΩ resistors contribute mismatch when the output stage is in unity gain mode (with G02− and G02+ floating).
At input stage gains greater than 1, gain drift increases as a result of the individual drift of the 3-kΩ resistors in the feedback of A1 and A2, relative to the drift of external gain resistor RG. The low temperature coefficient of the internal feedback resistors improves the overall temperature stability of applications using input-stage gains greater than 1 V/V over alternate solutions. The low resistor values required for high gain make wiring resistance an important consideration. Sockets add to the wiring resistance and contribute additional gain error (such as a possible unstable gain error) at gains of approximately 20 or greater. To maintain stability, avoid parasitic capacitance of more than a few picofarads at the RG connections. Careful matching of any parasitics on the RG pins maintains optimal CMRR over frequency.