JAJSGE1B october   2018  – october 2020 ISO1042-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Transient Immunity
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Ratings
    7. 6.7  Insulation Specifications
    8. 6.8  Safety-Related Certifications
    9. 6.9  Safety Limiting Values
    10. 6.10 Electrical Characteristics - DC Specification
    11. 6.11 Switching Characteristics
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CAN Bus States
      2. 8.3.2 Digital Inputs and Outputs: TXD (Input) and RXD (Output)
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant Timeout (DTO)
        2. 8.3.3.2 Thermal Shutdown (TSD)
        3. 8.3.3.3 Undervoltage Lockout and Default State
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 Unpowered Device
        6. 8.3.3.6 CAN Bus Short Circuit Current Limiting
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
        2. 9.2.2.2 CAN Termination
      3. 9.2.3 Application Curve
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.7 Insulation Specifications

PARAMETERTEST CONDITIONSSPECIFICATIONSUNIT
DW-16DWV-8
IEC 60664-1
CLRExternal clearance(1)Side 1 to side 2 distance through air>8>8.5mm
CPGExternal Creepage(1)Side 1 to side 2 distance across package surface>8>8.5mm
DTIDistance through the insulationMinimum internal gap (internal clearance)>17>17µm
CTIComparative tracking indexIEC 60112; UL 746A>600>600V
Material GroupAccording to IEC 60664-1II
Overvoltage categoryRated mains voltage ≤ 600 VRMSI-IVI-IV
Rated mains voltage ≤ 1000 VRMSI-IIII-III
DIN VDE V 0884-11:2017-01(2)
VIORMMaximum repetitive peak isolation voltageAC voltage (bipolar)15001500VPK
VIOWMMaximum isolation working voltageAC voltage (sine wave); time-dependent dielectric breakdown (TDDB) test;10601060VRMS
DC voltage15001500VDC
VIOTMMaximum transient isolation voltageVTEST = VIOTM, t = 60 s (qualification); VTEST = 1.2 × VIOTM, t = 1 s (100% production)70717071VPK
VIOSMMaximum surge isolation voltage
ISO1042-Q1(3)		Test method per IEC 62368-1, 1.2/50 µs waveform, VTEST = 1.6 × VIOSM = 10000 VPK (qualification)62506250VPK
Maximum surge isolation voltage
ISO1042B-Q1(3)		Test method per IEC 62368-1, 1.2/50 µs waveform, VTEST = 1.3 × VIOSM = 6000 VPK (qualification)46154615VPK
qpdApparent charge(4)Method a: After I/O safety test subgroup 2/3, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM, tm = 10 s≤ 5≤ 5pC
Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60 s;
ISO1042-Q1: Vpd(m) = 1.6 × VIORM, tm = 10 s
ISO1042B-Q1: Vpd(m) = 1.2 × VIORM, tm = 10 s		≤ 5≤ 5
Method b1: At routine test (100% production) and preconditioning (type test), Vini = VIOTM, tini = 1 s;
ISO1042-Q1: Vpd(m) = 1.875 × VIORM, tm = 1 s
ISO1042B-Q1: Vpd(m) = 1.5 × VIORM, tm = 1 s		≤ 5≤ 5
CIOBarrier capacitance, input to output(5)VIO = 0.4 × sin (2 πft), f = 1 MHz11pF
RIOInsulation resistance, input to output(5)VIO = 500 V,  TA = 25°C> 1012> 1012Ω
VIO = 500 V,  100°C ≤ TA ≤ 150°C> 1011> 1011
VIO = 500 V at  TS = 150°C> 109> 109
Pollution degree22
Climatic category40/125/
21		40/125/
21
UL 1577
VISOWithstand isolation voltageVTEST = VISO , t = 60 s (qualification); VTEST = 1.2 × VISO , t = 1 s (100% production)50005000VRMS
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications.
(2) ISO1042-Q1 is suitable for safe electrical insulation and ISO1042B-Q1 is suitable for basic electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(3) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
(4) Apparent charge is electrical discharge caused by a partial discharge (pd).
(5) All pins on each side of the barrier tied together creating a two-pin device.