JAJSGE1B october   2018  – october 2020 ISO1042-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Transient Immunity
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Ratings
    7. 6.7  Insulation Specifications
    8. 6.8  Safety-Related Certifications
    9. 6.9  Safety Limiting Values
    10. 6.10 Electrical Characteristics - DC Specification
    11. 6.11 Switching Characteristics
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CAN Bus States
      2. 8.3.2 Digital Inputs and Outputs: TXD (Input) and RXD (Output)
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant Timeout (DTO)
        2. 8.3.3.2 Thermal Shutdown (TSD)
        3. 8.3.3.3 Undervoltage Lockout and Default State
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 Unpowered Device
        6. 8.3.3.6 CAN Bus Short Circuit Current Limiting
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
        2. 9.2.2.2 CAN Termination
      3. 9.2.3 Application Curve
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.1 CAN Bus States

The CAN bus has two states during operation: dominant and recessive. A dominant bus state, equivalent to logic low, is when the bus is driven differentially by a driver. A recessive bus state is when the bus is biased to a common mode of VCC / 2 through the high-resistance internal input resistors of the receiver, equivalent to a logic high. The host microprocessor of the CAN node uses the TXD pin to drive the bus and receives data from the bus on the RXD pin. See Figure 8-1 and Figure 8-2.

GUID-5163B007-F39C-4C47-BFB1-8D03A7CA9651-low.gifFigure 8-1 Bus States (Physical Bit Representation)
GUID-A8C7332B-7141-41CB-BDE4-67FB22B22ED8-low.gifFigure 8-2 Simplified Recessive Common Mode Bias and Receiver