JAJSFM6A June   2018  – October 2018 ISO224

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 デバイス比較表
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics
    10. 7.10 Switching Characteristics
    11. 7.11 Insulation Characteristics Curves
    12. 7.12 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Input
      2. 8.3.2 Input Clamp Protection Circuit
      3. 8.3.3 Isolation Channel Signal Transmission
      4. 8.3.4 Fail-Safe Output
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.9 Electrical Characteristics

minimum and maximum specifications apply from TA = –55°C to +125°C, VDD1 = 4.5 V to 18 V, VDD2 = 4.5 V to 5.5 V, VIN = –12 V to 12 V, and RLOAD = 10 kΩ; typical specifications are at TA = 25°C, and VDD1 = VDD2 = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
VOS Input offset voltage(1) Initial, at TA = 25°C, IN = GND1, ISO224B –5 ±1 5 mV
Initial, at TA = 25°C, IN = GND1, ISO224A –50 ±1 50
TCVOS Input offset voltage drift(1) ISO224B –15 ±3 15 µV/°C
ISO224A –60 ±12 60
CIN Input capacitance IN to GND1 2 pF
RIN Input resistance IN to GND1 1 1.25 MΩ
IIB Input bias current IN = GND1 ±15 nA
TCIIB Input bias current drift IN = GND1 ±30 pA/°C
en Input-referred noise density ISO224B 3 µV/√Hz
ISO224A 4
ANALOG OUTPUTS
Nominal gain (VOUTP – VOUTN) / VIN 1/3 V/V
EG Gain error(1) Initial, at TA = 25°C, ISO224B –0.3% ±0.05% 0.3%
Initial, at TA = 25°C, ISO224A –1% 0.4% 1%
TCEG Gain error drift(1) ISO224B –35 ±10 35 ppm/°C
ISO224A –60 ±20 60
Nonlinearity ISO224B –0.01% ±0.003% 0.01%
ISO224A –0.02% ±0.003% 0.02%
Nonlinearity drift ±0.1 ppm/°C
THD Total harmonic distortion fIN = 10 kHz –84 dB
Output noise IN = GND1, fIN = 0 Hz, BW = 10 kHz 300 µVRMS
IN = GND1, fIN = 0 Hz, BW = 100 kHz 360
PSRR Power-supply rejection ratio(2) vs VDD1, at DC –107 dB
vs VDD1, 100-mV and 10-kHz ripple –101
vs VDD2, at DC –71
vs VDD2, 100-mV and 10-kHz ripple –56
VOUT Output voltage OUTP or OUTN to GND2 GND2 + 0.2 VDD2 – 0.2 V
VCMout Common-mode output voltage (VOUTP + VOUTN) / 2 0.48 × VDD2 VDD2 / 2 0.52 × VDD2 V
VFAILSAFE Failsafe output voltage VDD1 missing, OUTP and OUTN forced to GND2 GND2 + 0.1 V
ISC Output short-circuit current On OUTP or OUTN to GND2 ±18 mA
Overload recovery time 5 µs
ROUT Output resistance On OUTP or OUTN to GND2 < 0.5 Ω
CLOAD Capacitive load drive(3) On OUTP or OUTN to GND2 100 pF
OUTP to OUTN 50
RLOAD Resistive load On OUTP or OUTN 10 kΩ
BW Small signal output bandwidth ISO224B 220 275 kHz
ISO224A 150 185
CMTI Common-mode transient immunity |GND1 – GND2| = 1 kV, ISO224B 55 80 kV/µs
|GND1 – GND2| = 1 kV, ISO224A 15 30
POWER SUPPLY
IDD1 High-side supply current 6.1 7.8 mA
IDD2 Low-side supply current 7.8 9.9 mA
(1) The typical value includes one sigma statistical variation.
(2) This parameter is output referred.
(3) Use series resistor to decouple higher capacilive load.