7 Parameter Measurement Information

Figure 7-1 Driver V_OD Test and Current Definitions

Figure 7-2 Driver V_OD With Common-Mode Loading Test Circuit

Figure 7-3 Test Circuit and Waveform Definitions For The Driver Common-Mode Output Voltage

Figure 7-4 Driver Switching Test Circuit and Voltage Waveforms

Figure 7-5 Driver High-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms

Figure 7-6 Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveform

Figure 7-7 Receiver Voltage and Current Definitions

Figure 7-8 Receiver Switching Test Circuit and Waveforms

Figure 7-9 Receiver Enable Test Circuit and Waveforms, Data Output High

Figure 7-10 Receiver Enable Test Circuit and Waveforms, Data Output Low

Figure 7-11 Transient Over-Voltage Test Circuit

Figure 7-12 Common-Mode Transient Immunity Test Circuit

Figure 7-13 Transition Times and Break-Before-Make Time Delay for D1, D2 Outputs