JAJSVN0E July   2009  – November 2024 ISO7220A-Q1 , ISO7221A-Q1 , ISO7221C-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Recommended Operating Conditions
    3. 5.3  Safety-Related Certifications
    4. 5.4  Thermal Information
    5. 5.5  Safety Limiting Values
    6. 5.6  Insulation Specifications
    7. 5.7  Electrical Characterstics
    8. 5.8  Electrical Characteristics
    9. 5.9  Electrical Characteristics
    10. 5.10 Electrical Charcteristics
    11. 5.11 Switching Characteristics
    12. 5.12 Switching Characteristics
    13. 5.13 Switching Characteristics
    14. 5.14 Switching Characteristics
    15. 5.15 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Insulation Lifetime
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PCB Material
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.9 Electrical Characteristics

VCC1 = 5 V, VCC2 = 3.3 V(1), over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ICC1 Supply current, VCC1 ISO7220x-Q1 Quiescent VI = VCC or 0 V, no load 1 2 mA
ISO7221x-Q1 8.5 17
ISO7220A-Q1 1 Mbps VI = VCC or 0 V, no load 2 3
ISO7221A-Q1 10 18
ISO7221C-Q1 25 Mbps VI = VCC or 0 V, no load 12 22
ICC2 Supply current, VCC2 ISO7220x-Q1 Quiescent VI = VCC or 0 V, no load 8 18 mA
ISO7221x-Q1 4.3 9.5
ISO7220A-Q1 1 Mbps VI = VCC or 0 V, no load 9 19
ISO7221A-Q1 5 11
ISO7221C-Q1 25 Mbps VI = VCC or 0 V, no load 6 12
VOH High-level output voltage ISO7220x-Q1 IOH = –4 mA VCC – 0.4 V
ISO7221x-Q1 (5-V side) VCC – 0.8
IOH = –20 μA VCC – 0.1
VOL Low-level output voltage IOL = 4 mA 0.4 V
IOL = 20 μA 0.1
VI(HYS) Input voltage hysteresis 150 mV
IIH High-level input current IN from 0 V to VCC 10 μA
IIL Low-level input current IN from 0 V to VCC –10 μA
CI Input capacitance to ground IN at VCC, VI = 0.4 sin (2πft), f=2MHz 1 pF
CMTI Common-mode transient immunity VI = VCC or 0 V, See Figure 6-3 15 40 kV/μs
(1) For the 5-V operation, VCC1 or VCC2 is specified from 4.5 V to 5.5 V.
For the 3.3-V operation, VCC1 or VCC2 is specified from 3 V to 3.6 V.