SLLSE39E June   2010  – May 2015 ISO7520C , ISO7521C

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: VCC1 and VCC2 at 5 V ± 5%
    6. 6.6  Electrical Characteristics: VCC1 at 5 V ± 5%, VCC2 at 3.3 V ± 5%
    7. 6.7  Electrical Characteristics: VCC1 at 3.3 V ± 5%, VCC2 at 5 V ± 5%
    8. 6.8  Electrical Characteristics: VCC1 and VCC2 at 3.3 V ± 5%
    9. 6.9  Switching Characteristics: VCC1 and VCC2 at 5 V ± 5%
    10. 6.10 Switching Characteristics: VCC1 at 5 V ± 5%, VCC2 at 3.3 V ± 5%
    11. 6.11 Switching Characteristics: VCC1 at 3.3 V ± 5%, VCC2 at 5 V ± 5%
    12. 6.12 Switching Characteristics: VCC1 and VCC2 at 3.3 V ± 5%
    13. 6.13 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Insulation Characteristics
      2. 8.3.2 IEC 60664-1 Ratings Table
      3. 8.3.3 Package Insulation and Safety-Related Specifications
      4. 8.3.4 Safety Limiting Values
      5. 8.3.5 Regulatory Information
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

11 Layout

11.1 Layout Guidelines

A minimum of four layers is required to accomplish a low EMI PCB design (see Figure 13). Layer stacking must be in the following order (top-to-bottom): high-speed signal layer, ground plane, power plane and low-frequency signal layer.

  • Routing the high-speed traces on the top layer avoids the use of vias (and the introduction of their inductances) and allows for clean interconnects between the isolator and the transmitter and receiver circuits of the data link.
  • Placing a solid ground plane next to the high-speed signal layer establishes controlled impedance for transmission line interconnects and provides an excellent low-inductance path for the return current flow.
  • Placing the power plane next to the ground plane creates additional high-frequency bypass capacitance of approximately 100 pF/in2.
  • Routing the slower speed control signals on the bottom layer allows for greater flexibility as these signal links usually have margin to tolerate discontinuities such as vias.

If an additional supply voltage plane or signal layer is needed, add a second power/ground plane system to the stack to keep it symmetrical. This makes the stack mechanically stable and prevents it from warping. Also the power and ground plane of each power system can be placed closer together, thus increasing the high-frequency bypass capacitance significantly. For detailed layout recommendations, see Application Note Digital Isolator Design Guide (SLLA284).

11.1.1 PCB Material

For digital circuit boards operating at less than 150 Mbps, (or rise and fall times higher than 1 ns), and trace lengths of up to 10 inches, use standard FR-4 epoxy-glass as PCB material. FR-4 (Flame Retardant 4) meets the requirements of Underwriters Laboratories UL94-V0, and is preferred over less expensive alternatives due to its lower dielectric losses at high frequencies, less moisture absorption, greater strength and stiffness, and self- extinguishing flammability characteristics.

11.2 Layout Example

ISO7520C ISO7521C layoutex_e39.gifFigure 13. Layout Recommendation