JAJSCV2F November   2016  – October 2024 ISO7730-Q1 , ISO7731-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics—5-V Supply
    10. 5.10 Supply Current Characteristics—5-V Supply
    11. 5.11 Electrical Characteristics—3.3-V Supply
    12. 5.12 Supply Current Characteristics—3.3-V Supply
    13. 5.13 Electrical Characteristics—2.5-V Supply 
    14. 5.14 Supply Current Characteristics—2.5-V Supply
    15. 5.15 Switching Characteristics—5-V Supply
    16. 5.16 Switching Characteristics—3.3-V Supply
    17. 5.17 Switching Characteristics—2.5-V Supply
    18. 5.18 Insulation Characteristics Curves
    19. 5.19 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Electromagnetic Compatibility (EMC) Considerations
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device I/O Schematics
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
        1. 8.2.3.1 Insulation Lifetime
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PCB Material
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Related Links
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DBQ|16
  • DW|16
サーマルパッド・メカニカル・データ
発注情報

5.15 Switching Characteristics—5-V Supply

VCC1 = VCC2 = 5 V ±10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 6-1 6 11  17  ns
PWD Pulse width distortion(1) |tPHL – tPLH| 0.6 5.9 ns
tsk(o) Channel-to-channel output skew time(2) Same-direction channels 4 ns
tsk(pp) Part-to-part skew time(3) 4.5 ns
tr Output signal rise time See Figure 6-1 1.3 3.9 ns
tf Output signal fall time 1.4 3.9 ns
tPHZ Disable propagation delay, high-to-high impedance output See Figure 6-2 8 22 ns
tPLZ Disable propagation delay, low-to-high impedance output 8 20 ns
tPZH Enable propagation delay, high impedance-to-high output for ISO773x 7 20 ns
Enable propagation delay, high impedance-to-high output for ISO773x with F suffix 3 8.5 μs
tPZL Enable propagation delay, high impedance-to-low output for ISO773x 3 8.5 μs
Enable propagation delay, high impedance-to-low output for ISO773x with F suffix 7 20 ns
tDO  Default output delay time from input power loss Measured from the time VCC goes below 1.7V. See Figure 6-3 0.1 0.3 μs
tie Time interval error 216 – 1 PRBS data at 100 Mbps 0.6 ns
(1) Also known as pulse skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.