JAJSCT7A
March 2016 – August 2016
ISO7820LL
,
ISO7821LL
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
4
改訂履歴
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety-Related Certifications
6.8
Safety Limiting Values
6.9
DC Electrical Characteristics
6.10
DC Supply Current Characteristics
6.11
Switching Characteristics
6.12
Insulation Characteristics Curves
6.13
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
Device I/O Schematics
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Electromagnetic Compatibility (EMC) Considerations
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
PCB Material
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
ドキュメントのサポート
12.1.1
関連資料
12.2
ドキュメントの更新通知を受け取る方法
12.3
コミュニティ・リソース
12.4
商標
12.5
静電気放電に関する注意事項
12.6
用語集
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DWW|16
MPDS567A
DW|16
MSOI003I
サーマルパッド・メカニカル・データ
DW|16
QFND505A
発注情報
jajsct7a_oa
jajsct7a_pm
7
Parameter Measurement Information
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t
r
≤ 3 ns, t
f
≤ 3 ns, Z
O
= 50 Ω.
B.
C
P
= 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 22.
Switching Characteristics Test Circuit and Voltage Waveforms
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 10 kHz, 50% duty cycle,
t
r
≤ 3 ns, t
f
≤ 3 ns, Z
O
= 50 Ω.
B.
C
L
= 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 23.
Enable and Disable Propagation Delay Time Test Circuit and Waveform
A.
C
L
= 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 24.
Default Output Delay Time Test Circuit and Voltage Waveforms
A.
C
L
= 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 25.
Common-Mode Transient Immunity Test Circuit
Figure 26.
Driver Test Circuit
Figure 27.
Voltage Definitions and Waveforms