JAJSJQ9C September   2021  – April 2022 ISOW7740 , ISOW7741 , ISOW7742 , ISOW7743 , ISOW7744

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics - Power Converter
    10. 7.10 Supply Current Characteristics - Power Converter
    11. 7.11 Electrical Characteristics Channel Isolator - VIO, VISOIN = 5-V
    12. 7.12 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 5-V
    13. 7.13 Electrical Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    14. 7.14 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    15. 7.15 Electrical Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    16. 7.16 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    17. 7.17 Electrical Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    18. 7.18 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    19. 7.19 Switching Characteristics - 5-V Supply
    20. 7.20 Switching Characteristics - 3.3-V Supply
    21. 7.21 Switching Characteristics - 2.5-V Supply
    22. 7.22 Switching Characteristics - 1.8-V Supply
    23. 7.23 Insulation Characteristics Curves
    24. 7.24 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Power Isolation
      2. 9.1.2 Signal Isolation
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Protection Features
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
      4. 10.2.4 Insulation Lifetime
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 サポート・リソース
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.4 Device Functional Modes

Table 9-2 lists the supply configurations for these devices.

Table 9-2 Supply Configuration Function Table
VDD (1)VIOVSELVISOOUT (3)
< VDD(UVLO+)>VIO(UVLO+)XOFF
>VDD(UVLO+)<VIO(UVLO+)XOFF
5 V1.71 V to 5.5 VHigh (shorted to VISOOUT)5 V
5 V or 3.3 V1.71 V to 5.5 VLow (shorted to GND2)(2)3.3 V
(1) VDD= 3.3 V, MODE shorted to VISOOUT(essentially VISOOUT = 5 V) is not the recommended mode of operation
(2) The MODE pin has a weak pulldown internally. Therefore for VISOOUT = 3.3 V, the MODE pin should be strongly connected to the GND2 pin in noisy system scenarios.
(3) VISOOUT shorted to VISOIN on PCB and both GND2 pins are shorted to each other and EN=High

Table 9-3 lists the channel isolators functional modes for these devices.

Table 9-3 Channel Isolator Function Table
CHANNEL INPUT SUPPLY (VCCI) (1)CHANNEL OUTPUT SUPPLY (VCCO)(1)INPUT (INx)

IO ENABLE (EN_IOx)

OUTPUT
(OUTx)		COMMENTS
PU

PU

HH or

Open

H

Normal Operation: A channel output assumes the logic state of its input.
LH or Open

L

Open

H or Open

Default

Default mode(2): When INx is open, the corresponding channel output goes to its default logic state.

X

L

Z and Default

A low value of output enable causes the outputs of the same side to be high impedance and the output of opposite side to be fail-safe default state.

PD

PU

X

H or Open

Default

Default mode(2): When VCCI is unpowered, a channel output assumes the logic state based on the selected default option. When VCCI transitions from unpowered to powered-up, a channel output assumes the logic state of the input. When VCCI transitions from powered-up to unpowered, channel output assumes the selected default state.
(1) VCCI = Input-side VIO or VISOIN; VCCO = Output-side VIO or VISOIN; PU = Powered up (VIO > 1.7 V, VISOIN > 1.7 V); PD = Powered down (VIO < 1 V, VISOIN < 1 V); X = Irrelevant; H = High level; L = Low level.
(2) In the default condition, the output is high for the ISOW774x device and low with the F suffix.