JAJSRC0
May 2023
IWR1843AOP
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
3.1
機能ブロック図
4
Revision History
5
Device Comparison
5.1
Related Products
6
Terminal Configuration and Functions
6.1
Pin Diagram
6.2
Pin Attributes
6.3
Signal Descriptions
6.3.1
Pin Functions - Digital and Analog [ALP Package]
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Power-On Hours (POH)
7.4
Recommended Operating Conditions
7.5
Power Supply Specifications
7.6
Power Consumption Summary
7.7
RF Specification
7.8
CPU Specifications
7.9
Thermal Resistance Characteristics for FCBGA Package [ALP0180A]
7.10
Timing and Switching Characteristics
7.10.1
Antenna Radiation Patterns
7.10.1.1
Antenna Radiation Patterns for Receiver
7.10.1.2
Antenna Radiation Patterns for Transmitter
7.10.2
Antenna Positions
7.10.3
Power Supply Sequencing and Reset Timing
7.10.4
Input Clocks and Oscillators
7.10.4.1
Clock Specifications
7.10.5
Multibuffered / Standard Serial Peripheral Interface (MibSPI)
7.10.5.1
Peripheral Description
7.10.5.2
MibSPI Transmit and Receive RAM Organization
7.10.5.2.1
SPI Timing Conditions
7.10.5.2.2
SPI Controller Mode Switching Parameters (CLOCK PHASE = 0, SPICLK = output, SPISIMO = output, and SPISOMI = input)
7.10.5.2.3
SPI Controller Mode Switching Parameters (CLOCK PHASE = 1, SPICLK = output, SPISIMO = output, and SPISOMI = input)
7.10.5.3
SPI Peripheral Mode I/O Timings
7.10.5.3.1
SPI Peripheral Mode Switching Parameters (SPICLK = input, SPISIMO = input, and SPISOMI = output)
7.10.5.4
Typical Interface Protocol Diagram (Peripheral Mode)
7.10.6
LVDS Interface Configuration
7.10.6.1
LVDS Interface Timings
7.10.7
General-Purpose Input/Output
7.10.7.1
Switching Characteristics for Output Timing versus Load Capacitance (CL) #GUID-A9917993-C388-4AAC-B9C6-6B2BF583E88E/T4362547-45 #GUID-A9917993-C388-4AAC-B9C6-6B2BF583E88E/T4362547-50
7.10.8
Controller Area Network Interface (DCAN)
7.10.8.1
Dynamic Characteristics for the DCANx TX and RX Pins
7.10.9
Controller Area Network - Flexible Data-rate (CAN-FD)
7.10.9.1
Dynamic Characteristics for the CANx TX and RX Pins
7.10.10
Serial Communication Interface (SCI)
7.10.10.1
SCI Timing Requirements
7.10.11
Inter-Integrated Circuit Interface (I2C)
7.10.11.1
I2C Timing Requirements #GUID-D26A1D00-D5E4-49AB-AFF7-B0ED1920A8A5/T4362547-185
7.10.12
Quad Serial Peripheral Interface (QSPI)
7.10.12.1
QSPI Timing Conditions
7.10.12.2
Timing Requirements for QSPI Input (Read) Timings #GUID-F4461E81-32E4-4CB7-B562-43AFC94843D1/T4362547-210 #GUID-F4461E81-32E4-4CB7-B562-43AFC94843D1/T4362547-209
7.10.12.3
QSPI Switching Characteristics
7.10.13
ETM Trace Interface
7.10.13.1
ETMTRACE Timing Conditions
7.10.13.2
ETM TRACE Switching Characteristics
7.10.14
Data Modification Module (DMM)
7.10.14.1
DMM Timing Requirements
7.10.15
JTAG Interface
7.10.15.1
JTAG Timing Conditions
7.10.15.2
Timing Requirements for IEEE 1149.1 JTAG
7.10.15.3
Switching Characteristics Over Recommended Operating Conditions for IEEE 1149.1 JTAG
8
Detailed Description
8.1
Overview
8.2
機能ブロック図
8.3
Subsystems
8.3.1
RF and Analog Subsystem
8.3.1.1
Clock Subsystem
8.3.1.2
Transmit Subsystem
8.3.1.3
Receive Subsystem
8.3.2
Processor Subsystem
8.3.3
Host Interface
8.3.4
Main Subsystem Cortex-R4F Memory Map
8.3.5
DSP Subsystem Memory Map
8.4
Other Subsystems
8.4.1
ADC Channels (Service) for User Application
8.4.1.1
GP-ADC Parameter
9
Monitoring and Diagnostics
9.1
Monitoring and Diagnostic Mechanisms
9.1.1
Error Signaling Module
10
Applications, Implementation, and Layout
10.1
Application Information
10.2
Reference Schematic
11
Device and Documentation Support
11.1
Device Nomenclature
11.2
Tools and Software
11.3
Documentation Support
11.4
サポート・リソース
11.5
Trademarks
11.6
静電気放電に関する注意事項
11.7
用語集
12
Mechanical, Packaging, and Orderable Information
12.1
Packaging Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
ALP|180
MPBGAS7A
サーマルパッド・メカニカル・データ
発注情報
jajsrc0_oa
7.10.5
Multibuffered / Standard Serial Peripheral Interface (MibSPI)