During normal device operation, a number of parameters are continuously monitored

For the following parameters, if a fault condition is detected, the device is transferred to the FAULT state. Only if the fault condition is cleared then the part transitions to DIAGNOSTIC state (for fault thresholds refer to Diagnostics and for de-glitch times refer to Switching Characteristics ):

• VCC overvoltage check: if the VCC voltage exceeds the V_{OVUTH_VCC}, fault condition is detected in the t_{VCC_FLT_DT}. This fault detection delay allows the LDC5072-Q1 to filter out short glitches on the VCC pin. Once the voltage drops below the V_{OVLTH_VCC}, the fault condition is cleared.
• VCC undervoltage check (active only in VCC = 5 V mode): if the VCC voltage falls below the VCC_UVLTH, fault condition is detected in the t_{VCC_FLT_DT}. This fault detection delay allows the LDC5072-Q1 to filter out short glitches on the VCC pin. Once the voltage rises above the V_{UVUTH_VCC}, the fault condition is cleared.
• VREG overvoltage check: if the VREG voltage exceeds the V_{OVUTH_VREG}, fault condition is detected in the t_{VREG_OV_DT}. This fault detection delay allows the LDC5072-Q1 to filter out short glitches on the VREG pin. Once the voltage drops below the V_{OVLTH_VREG}, the fault condition is cleared.
• Thermal Shutdown Check: If the temperature of the die increases and crosses T_{TSD_rise}, a fault condition is detected. Once the die temperature falls below T_{TSD_fall}, the fault condition is cleared.

For the following parameters, if a fault condition is detected, the device is transferred to the FAULT state and then to the DIAGNOSTICS state to attempt recovery and detect if the fault is still present. The zero-crossing mentioned in this section refers to crossing of the common voltage of a differential signal pair.

• LC oscillator frequency check: if the LC tank oscillation frequency exceeds the f_{FLTH_LC} or falls below the f_{FLTL_LC} parameter, fault condition is detected in the t_{FAULT_DT}. This fault detection delay allows the LDC5072-Q1 to filter out short glitches on the LC tank pins.
• LC Loop control check: checks for amplitude and common mode voltage loop of the LC oscillator by monitoring internal node voltages with a comparator. The fault condition de-gltiched for t_{LC_FLT_DT}.
• Output signal Out-Of-Range check: if the voltage on one of the four OUT pins exceeds the V_{OOR_H_OUTx}_PIN threshold, or falls below the V_{OOR_L_OUTx} threshold parameter, fault condition is detected in the t_{OUT_OOR_DT}.
• Output signal voltage check: this diagnostic compares the states of the zero-crossing comparators of OUT pins with the corresponding zero-crossing comparators of the AGC block outputs. A valid rotational signal must be present for this check, and the detection time, will depend on the rotational speed of the motor.
• Output signal common mode check: this diagnostic detects the OUT0 and OUT1 pin pairs deviation from the expected common-mode voltage. If V_OUT0P+V_OUT0N is greater than the range defined by V_{CM_H_OUTx_PIN} and V_{CM_L_OUTx_PIN}, the fault is reported with a de-glitch time of t_{OUT_CM_DT}.
• Output pin short check: detects fault condition if any of the two output pins (OUTx) are shorted. It compares the differential output of each channel to the corresponding internal output of the AGC block (or fixed gain block for fixed gain mode) and flags a fault condition if the difference is greater than V_{OUTx_SHRT_CMP_OFF}. The fault signal is de-glitched for t_{OUTx_SHORT_DT} before signaling a fault. During this de-glitch period, the OUTx pins are enabled even while being shorted.
• Frequency imbalance check: given a valid rotation signal, the device monitors that exactly 1 zero-crossing of the sine output occurs between two consecutive zero-crossings of the cosine output, and vice versa. A valid rotation signal detected using zero-crossing information must be present for this check to be enabled and detection time will depend on the rotational speed of the motor. For this fault to be detected two conditions must be met:
  • The device has detected 1KHz rotation frequency and the measured rotation frequency on both channels is less than 10KHz
  • The rotation frequency range condition is met for 10 consecutive cycles or 20 half cycles
• Phase imbalance check: the device checks that there is a time delay of at least t_{MIN_PH_IMB} between the zero crossing of sine output and the following zero crossing of cosine output, and vice versa.
• Input signal out of range check (valid only for AGC mode): if the AGC gain code of VAL_{AGC_INP_OOR_H} or greater, or VAL_{AGC_INP_OOR_L} or less, is required to keep the OUT signals in the AGC target range (AGC_Target), the input signals are out of range, and fault is reported. This fault is de-glitched for t_{AGC_VAL_DT}.
• Input signal out of range check: if input signals during normal operation cross V_{OOR_x_INx_PIN} thresholds multiple times in an interval, or, stays constantly above V_{OOR_H_INx_PIN} or below V_{OOR_L_INx_PIN} for t_{IN_OOR_DT}, the input signals are out of range, and fault is reported. The DC fault, combination of any of input signaling a fault after individual de-glitch time, is further de-glitched for t_{INx_FLT_DT}.
• Input signal out of range check: if LPF output signals during normal operation cross V_{OOR_x_INx_LPF} thresholds multiple times in an interval, or, stay above V_{OOR_H_INx_LPF} or below V_{OOR_L_INx_LPF} for t_{LPF_OOR_DT}, the input signals are out of range, and fault is reported.

For the following parameters, if a fault condition is detected, the device is transferred to the DISABLED state and a recovery is attempted (See DISABLED State):

• Register CRC check: the LDC5072-Q1 calculates the CRC value of the Safety-critical register settings and compares the CRC value to the recorded expected CRC value. In case of FAULT, the LDC5072-Q1 transitions to the DISABLED state. This check is performed continuously.
• Critical registers redundancy check: the device checks the validity of the critical registers vs its redundant copy. In case of a discrepancy, the device immediately transitions to the DISABLED state
• TM0 state check: the device checks if the TM0 pin state was changed after its state was determined during Initialization diagnostics.
• TOUT state check: the device checks if the TOUT pin state was changed after its state was determined during Initialization diagnostics.
• AGC_EN toggle check: the device checks if the AGC_EN state was changed after its state was determined during Initialization diagnostics. This check has a de-glitch time of t_{AGC_EN_TGL_DT}