JAJSM23G December   2012  – May 2021 LM25018

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Characteristics
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Control Overview
      2. 7.3.2  VCC Regulator
      3. 7.3.3  Regulation Comparator
      4. 7.3.4  Overvoltage Comparator
      5. 7.3.5  On-Time Generator
      6. 7.3.6  Current Limit
      7. 7.3.7  N-Channel Buck Switch and Driver
      8. 7.3.8  Synchronous Rectifier
      9. 7.3.9  Undervoltage Detector
      10. 7.3.10 Thermal Protection
      11. 7.3.11 Ripple Configuration
      12. 7.3.12 Soft Start
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Application Circuit: 12.5-V to 48-V Input and 10-V, 325-mA Output Buck Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 RFB1, RFB2
          3. 8.2.1.2.3 Frequency Selection
          4. 8.2.1.2.4 Inductor Selection
          5. 8.2.1.2.5 Output Capacitor
          6. 8.2.1.2.6 Type III Ripple Circuit
          7. 8.2.1.2.7 VCC and Bootstrap Capacitor
          8. 8.2.1.2.8 Input Capacitor
          9. 8.2.1.2.9 UVLO Resistors
      2. 8.2.2 Application Curves
      3. 8.2.3 Typical Isolated DC-DC Converter Using LM25018
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1  Transformer Turns Ratio
          2. 8.2.3.2.2  Total IOUT
          3. 8.2.3.2.3  RFB1, RFB2
          4. 8.2.3.2.4  Frequency Selection
          5. 8.2.3.2.5  Transformer Selection
          6. 8.2.3.2.6  Primary Output Capacitor
          7. 8.2.3.2.7  Secondary Output Capacitor
          8. 8.2.3.2.8  Type III Feedback Ripple Circuit
          9. 8.2.3.2.9  Secondary Diode
          10. 8.2.3.2.10 VCC and Bootstrap Capacitor
          11. 8.2.3.2.11 Input Capacitor
          12. 8.2.3.2.12 UVLO Resistors
          13. 8.2.3.2.13 VCC Diode
        3. 8.2.3.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.3 Typical Isolated DC-DC Converter Using LM25018

An isolated supply using LM25018 is shown in Figure 8-5. Inductor (L) in a typical buck circuit is replaced with a coupled inductor (X1). A diode (D1) is used to rectify the voltage on a secondary output. The nominal voltage at the secondary output (VOUT2) is given by Equation 20.

Equation 20. GUID-D66446BA-679F-489B-A218-37B70246C079-low.gif

where

  • VF is the forward voltage drop of D1.
  • NP and NS are the number of turns on the primary and secondary of coupled inductor X1.

For output voltage (VOUT1) more than one diode drop above the maximum VCC (8.55 V), the VCC pin can be diode connected to VOUT1 for higher efficiency and low dissipation in the IC. See the AN-2292 Designing an Isolated Buck (Flybuck) Converter Application Report for a complete isolated bias design with a Fly-Buck™ converter.

GUID-AC4A7972-6D5A-4F4A-BFA1-545917DFA2A4-low.gifFigure 8-5 Typical Isolated Application Schematic