JAJSCZ3A March 2017 – February 2018 LM25141-Q1
PRODUCTION DATA.
The soft-start feature allows the controller to gradually reach the steady-state operating point, thus reducing start-up stresses and surges. The LM25141-Q1 regulates the FB pin to the SS pin voltage or the internal 1.2-V reference, whichever is lower. At the beginning of the soft-start sequence when SS = 0 V, the internal 20-µA soft-start current source gradually increases the voltage on an external soft-start capacitor connected to the SS pin, resulting in a gradual rise of the FB and output voltages. The controller is in the forced PWM (FPWM) mode when the DEMB pin is connected to VDDA. In this mode, the SS pin is clamped at 200 mV above the feedback voltage. This ensures that SS will be pulled low quickly when FB falls during brief overcurrent events to prevent overshoot of VOUT during recovery. SS can be pulled low with an external circuit to stop switching, but TI does not recommends this. Pulling SS low results in COMP being pulled down internally, as well. If the controller is operating in FPWM mode (DEMB = VDDA), LO remains on and the low-side MOSFET discharges the VOUT capacitor resulting in large negative inductor current. In contrast when the LM25141-Q1 pulls SS low internally due to a fault condition, the LO gate driver is disabled.