JAJSL79 December 2021 LM25148
PRODUCTION DATA
A synchronous buck regulator implemented with a low-side synchronous MOSFET rather than a diode has the capability to sink negative current from the output during conditions of, light-load, output overvoltage, and pre-bias start-up conditions. The LM25148 provides a diode emulation feature that can be enabled to prevent reverse (drain-to-source) current flow in the low-side MOSFET. When configured for Diode Emulation mode, the low-side MOSFET is switched off when reverse current flow is detected by sensing the SW voltage using a zero-cross comparator. The benefit of this configuration is lower power loss during light-load conditions. The disadvantage of diode emulation mode is slower light-load transient response.
The PFM/SYNC pin configures diode emulation. To enable diode emulation and thus achieve low-IQ current at light loads, connect PFM/SYNC to VDDA. If FPWM with continuous conduction mode (CCM) operation is desired, tie PFM/SYNC to AGND. Note that diode emulation is automatically engaged to prevent reverse current flow during a prebias start-up. A gradual change from DCM to CCM operation provides monotonic start-up performance.
To synchronize the LM25148 to an external source, apply a logic-level clock to the PFM/SYNC pin. The LM25148 can be synchronized to ±20% of the programmed frequency up to a maximum of 2.5 MHz. If there is an RT resistor and a synchronization signal, the LM25148 ignores the RT resistor and synchronizes to the external clock. Under low VIN conditions when the minimum off time is reached, the synchronization signal is ignored, allowing the switching frequency to reduce to maintain output voltage regulation.