SNVS135E September   1999  – December 2014 LM2660

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Changing Oscillator Frequency
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Voltage Inverter
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Capacitor Selection
          2. 9.2.1.2.2 Paralleling Devices
          3. 9.2.1.2.3 Cascading Devices
          4. 9.2.1.2.4 Regulating VOUT
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Positive Voltage Doubler
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Detailed Description

8.1 Overview

The LM2660 contains four large CMOS switches which are switched in a sequence to invert the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 13 illustrates the voltage conversion scheme. When S1 and S3 are closed, C1 charges to the supply voltage V+. During this time interval switches S2 and S4 are open. In the second time interval, S1 and S3 are open and S2 and S4 are closed, C1 is charging C2. After a number of cycles, the voltage across C2 will be pumped to V+. Since the anode of C2 is connected to ground, the output at the cathode of C2 equals −(V+) assuming no load on C2, no loss in the switches, and no ESR in the capacitors. In reality, the charge transfer efficiency depends on the switching frequency, the on-resistance of the switches, and the ESR of the capacitors.

1291121.pngFigure 13. Voltage Inverting Principle

8.2 Functional Block Diagram

blockdiag.gif

8.3 Feature Description

8.3.1 Changing Oscillator Frequency

The internal oscillator frequency can be selected using the Frequency Control (FC) pin. When FC is open, the oscillator frequency is 10 kHz; when FC is connected to V+, the frequency increases to 80 kHz. A higher oscillator frequency allows smaller capacitors to be used for equivalent output resistance and ripple, but increases the typical supply current from 0.12 mA to 1 mA.

The oscillator frequency can be lowered by adding an external capacitor between OSC and GND. (See Typical Characteristics.) Also, in the inverter mode, an external clock that swings within 100 mV of V+ and GND can be used to drive OSC. Any CMOS logic gate is suitable for driving OSC. LV must be grounded when driving OSC. The maximum external clock frequency is limited to 150 kHz.

The switching frequency of the converter (also called the charge pump frequency) is half of the oscillator frequency.

NOTE

OSC cannot be driven by an external clock in the voltage-doubling mode.

Table 1. LM2660 Oscillator Frequency Selection

FC OSC OSCILLATOR
Open Open 10 kHz
V+ Open 80 kHz
Open or V+ External Capacitor See Typical Characteristics
N/A External Clock External Clock
(inverter mode only) Frequency

8.4 Device Functional Modes

When V+ is applied to the LM2660, the device becomes enabled and will operate in which ever configuration the device is placed (inverter, doubler, etc.).