JAJS559L September   1998  – June 2016 LM2671

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics - 3.3 V
    6. 7.6  Electrical Characteristics - 5 V
    7. 7.7  Electrical Characteristics - 12 V
    8. 7.8  Electrical Characteristics - Adjustable
    9. 7.9  Electrical Characteristics - All Output Voltage Versions
    10. 7.10 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Switch Output
      2. 8.3.2 Input
      3. 8.3.3 C Boost
      4. 8.3.4 Ground
      5. 8.3.5 Sync
      6. 8.3.6 Feedback
      7. 8.3.7 ON/OFF
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Fixed Output Voltage Version
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection (L1)
          2. 9.2.1.2.2 Output Capacitor Selection (COUT)
          3. 9.2.1.2.3 Catch Diode Selection (D1)
          4. 9.2.1.2.4 Input Capacitor (CIN)
          5. 9.2.1.2.5 Boost Capacitor (CB)
          6. 9.2.1.2.6 Soft-Start Capacitor (CSS) - Optional
          7. 9.2.1.2.7 Frequency Synchronization (optional)
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Adjustable Output Voltage Version
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Programming Output Voltage
          2. 9.2.2.2.2 Inductor Selection (L1)
          3. 9.2.2.2.3 Output Capacitor Selection (COUT)
          4. 9.2.2.2.4 Catch Diode Selection (D1)
          5. 9.2.2.2.5 Input Capacitor (CIN)
          6. 9.2.2.2.6 Boost Capacitor (CB)
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報
    1. 13.1 DAP (WSONパッケージ)

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

D or P Package
8-Pin SOIC or PDIP
Top View
NHN Package
16-Pin WSON
Top View
Connect DAP to pin 11 and 12

Pin Functions

PIN I/O DESCRIPTION
NAME SOIC, PDIP WSON
CB 1 1 I Bootstrap capacitor connection for high-side driver. Connect a high-quality,
100-nF capacitor from CB to VSW Pin.
SS 2 4 I Soft-start Pin. Connect a capacitor from this pin to GND to control the output voltage ramp. If the feature not desired, the pin can be left floating.
SYNC 3 6 I This input allows control of the switching clock frequency. If left open-circuited the regulator is switched at the internal oscillator frequency, typically 260 kHz.
FB 4 8 I Feedback sense input pin. Connect to the midpoint of feedback divider to set VOUT for ADJ version or connect this pin directly to the output capacitor for a fixed output version.
ON/OFF 5 9 I Enable input to the voltage regulator. High = ON and low = OFF. Pull this pin high or float to enable the regulator
VSW 8 15, 16 O Source pin of the internal high-side FET. This is a switching node. Attached this pin to an inductor and the cathode of the external diode.
GND 6 11, 12 Power ground pins. Connect to system ground. Ground pins of CIN and COUT. Path to CIN must be as short as possible.
VIN 7 14 I Supply input pin to collector pin of high-side FET. Connect to power supply and input bypass capacitors CIN. Path from VIN pin to high frequency bypass CIN and GND must be as short as possible.
NC 2, 3, 5, 7, 10, 13 No connect pins