JAJSA30G November   2002  – May 2019 LM2733

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
      2.      効率と負荷電流との関係
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Switching Frequency
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Pin Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Selecting the External Capacitors
        2. 8.2.2.2  Selecting the Output Capacitor
        3. 8.2.2.3  Selecting the Input Capacitor
        4. 8.2.2.4  Feedforward Compensation
        5. 8.2.2.5  Selecting Diodes
        6. 8.2.2.6  Setting the Output Voltage
        7. 8.2.2.7  Switching Frequency
        8. 8.2.2.8  Duty Cycle
        9. 8.2.2.9  Inductance Value
        10. 8.2.2.10 Maximum Switch Current
        11. 8.2.2.11 Calculating Load Current
        12. 8.2.2.12 Design Parameters VSW and ISW
        13. 8.2.2.13 Thermal Considerations
        14. 8.2.2.14 Minimum Inductance
        15. 8.2.2.15 Inductor Suppliers
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 商標
    2. 11.2 静電気放電に関する注意事項
    3. 11.3 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.13 Thermal Considerations

At higher duty cycles, the increased ON time of the FET means the maximum output current will be determined by power dissipation within the LM2733 FET switch. The switch power dissipation from ON-state conduction is calculated by:

Equation 11. P(SW) = DC x IIND(AVE)2 x RDSON

There will be some switching losses as well, so some derating needs to be applied when calculating IC power dissipation.