JAJSVY9F July   2004  – December 2024 LM317L

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 NPN Darlington Output Drive
      2. 6.3.2 Overload Block
      3. 6.3.3 Programmable Feedback
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal operation
      2. 6.4.2 Operation With Low Input Voltage
      3. 6.4.3 Operation at Light Loads
      4. 6.4.4 Operation In Self Protection
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Capacitor
        2. 7.2.2.2 Output Capacitor
        3. 7.2.2.3 Feedback Resistors
        4. 7.2.2.4 Adjustment Terminal Capacitor
        5. 7.2.2.5 Design Options and Parameters
        6. 7.2.2.6 Output Voltage
        7. 7.2.2.7 Ripple Rejection
        8. 7.2.2.8 Input Short Protection
      3. 7.2.3 Application Curve
    3. 7.3 System Examples
      1. 7.3.1 Regulator Circuit With Improved Ripple Rejection
      2. 7.3.2 0V to 30V Regulator Circuit
      3. 7.3.3 Precision Current-Limiter Circuit
      4. 7.3.4 Tracking Preregulator Circuit
      5. 7.3.5 Slow-Turn On 15V Regulator Circuit
      6. 7.3.6 50mA Constant-Current, Battery-Charger Circuit
      7. 7.3.7 Current-Limited 6V Charger
      8. 7.3.8 High-Current Adjustable Regulator
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
    6. 7.6 Estimating Junction Temperature
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
  • PW|8
  • PK|3
  • LP|3
サーマルパッド・メカニカル・データ
発注情報

5.5 Electrical Characteristics

Unless otherwise noted, specifications over recommended operating virtual-junction temperature range, VI – VO = 5V and IO = 40mA, P ≤ rated dissipation, measured with a 0.1μF capacitor across the input and a 1μF capacitor across the output.
PARAMETERTEST CONDITIONS(1)MINTYPMAXUNIT
Line regulationVI – VO = 5V to 35VTJ = 25°CLegacy and new chip0.010.02%/V
IO = 2.5mA to 100mALegacy and new chip0.020.05
Ripple rejectionVO = 10V, f = 120HzLegacy and new chip65dB
VO = 10V, 10μF capacitor between ADJUSTMENT and groundLegacy and new chip6680
Output voltage regulationVI – VO = 5V to 35V, TJ = 25°C,
IO = 2.5mA to 100mA		VO ≤ 5VLegacy and new chip25mV
VO ≥ 5VLegacy and new chip5mV/V
VI – VO = 5V to 35V,
IO = 2.5mA to 100mA		VO ≤ 5VLegacy and new chip50mV
VO ≥ 5VLegacy and new chip10mV/V
Output voltage change with temperatureTJ = 0°C to 125°CLegacy and new chip10mV/V
Output voltage long-term driftAfter 1000 hours at TJ = 125°C and VI – VO = 35VLegacy and new chip310mV/V
Output noise voltagef = 10Hz to 10kHz, TJ = 25°CLegacy and new chip30μV/V
Minimum output current to maintain regulationVI – VO = 35VLegacy chip1.52.5mA
New chip3.55
Peak output current3V ≤ VI – VO ≤ 13VLegacy and new chip100200mA
VI – VO = 35VLegacy chip100200
New chip2550

150

ADJUSTMENT currentLegacy and new chip50100μA
Change in ADJUSTMENT currentVI – VO = 5V, IO = 40 mALegacy and new chip0.25μA
Reference voltage (output to ADJUSTMENT)VI – VO = 5V, IO = 40 mA1.21.251.3V
(1) For all tests unless otherwise noted, power dissipation ≤ 1.4W in PK, D, and PW packages and ≤ 0.625W for LP package. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.