10.1.1 DSBGA Package Assembly and Use

Use of the DSBGA package requires specialized board layout, precision mounting and careful reflow techniques, as detailed in the AN-1112 DSBGA Wafer Level Chip Scale Package application report. For best results in assembly, alignment ordinals on the PC board should be used to facilitate placement of the device. The pad style used with DSBGA package must be the non-solder mask defined (NSMD) type. This pad type means that the solder-mask opening is larger than the pad size which prevents a lip that otherwise forms if the solder-mask and pad overlap when holding the device off the surface of the board causing interference with mounting. For specific instructions on how to do this, refer to the AN-1112 DSBGA Wafer Level Chip Scale Package application report.

The 6-bump package used for LM3241 has 300 micron solder balls and requires 10.82 mil pads for mounting on the circuit board. The trace to each pad should enter the pad with a 90° angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 7 mil wide, for a section approximately 7 mil long, as a thermal relief. Then each trace should neck up or down to its optimal width. The important criterion is symmetry which ensures the solder bumps on the LM3241 reflow evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for bumps A2 and C2. Because the VIN and GND pins are typically connected to large copper planes, inadequate thermal relief can result in late or inadequate reflow of these bumps.

The DSBGA package is optimized for the smallest possible size in applications with red or infrared opaque cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, DSBGA devices are sensitive to light in the red and infrared range shining on the exposed die edges of the package.

TI recommends connecting a 10-nF capacitor between the VCON pin and ground for non-standard ESD events or environments and manufacturing processes. This capacitor prevents unexpected output voltage drift.

10.1.2 Board Layout Considerations

Printed-circuit board (PCB) layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These factors can send erroneous signals to the DC-DC converter device, resulting in poor regulation or instability. Poor layout can also result in reflow problems leading to poor solder joints between the DSBGA package and board pads—poor solder joints can result in erratic or degraded performance. Good layout for the LM3241 can be implemented by following a few simple design rules, as shown in Figure 33.

1. Place the LM3241 on 10.82 mil pads. As a thermal relief, connect each pad with a 7mil wide, approximately 7mil long trace, and then incrementally increase each trace to its optimal width. The V_IN and GND traces are especially recommended to be as wide as possible. The important criterion is symmetry to ensure the solder bumps reflow evenly (refer to the AN-1112 DSBGA Wafer Level Chip Scale Package application report).
2. Place the LM3241, inductor, and filter capacitors close together and make the traces short. The traces between these components carry relatively high switching current and act as antennae. Following this rule reduces radiated noise. Special care must be given to place the input filter capacitor very close to the VIN and GND pads.
3. Arrange the components so that the switching current loops curl in the same direction. During the first half of each cycle, current flows from the input filter capacitor, through the LM3241 and inductor to the output filter capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled up from ground, through the LM3241 by the inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing these loops so the current curls in the same direction prevents magnetic field reversal between the two half-cycles and reduces radiated noise.
4. Connect the ground pads of the LM3241 and filter capacitors together using generous component-side copper fill as a pseudo-ground plane. Then connect this to the ground-plane (if one is used) with several vias. This connection reduces ground-plane noise by preventing the switching currents from circulating through the ground plane. It also reduces ground bounce at the LM3241 by giving it a low impedance ground connection.
5. Use side traces between the power components and for power connections to the DC-DC converter circuit which reduces voltage errors caused by resistive losses across the traces.
6. Route noise sensitive traces such as the voltage feedback path away from noisy traces between the power components. The output voltage feedback point should be taken approximately 1.5 nH away from the output capacitor. The feedback trace also should be routed opposite to noise components. The voltage feedback trace must remain close to the LM3241 circuit and should be routed directly from FB to VOUT at the inductor and should be routed opposite to noise components. This trace placement allows fast feedback and reduces EMI radiated onto the voltage feedback trace of the DC-DC converter (see Figure 32).
Figure 32. Feedback Trace
7. Place noise-sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks, and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduce through distance.

In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board, arrange the CMOS digital circuitry around it (because this also generates noise), and then place sensitive preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout linear regulators.