ZHCSE56 数据表 | 德州仪器 TI.com.cn

SNVS875O August 2012 – December 2015 LM3262

PRODUCTION DATA.

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

YFQ|9
- MXBG169

サーマルパッド・メカニカル・データ

発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

	MIN	MAX	UNIT
VIN to SGND	−0.2	6	V
PGND to SGND	−0.2	0.2	V
EN, VCON, BPEN	(SGND − 0.2)	(V_IN + 0.2)	V
FB, SW	(PGND − 0.2)	(V_IN + 0.2)	V
Continuous power dissipation⁽³⁾	Internally limited
Junction temperature, T_J-MAX		150	°C
Maximum lead temperature (soldering, 10 sec)		260	°C
Storage temperature, T_stg	−65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to the potential at the GND pins.

(3) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T_J = 150°C (typical) and disengages at T_J = 130°C (typical).

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1250	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Input voltage, V_IN		2.5	5.5	V
Recommended load current	PWM mode	0	800	mA
Recommended load current	Bypass mode	0	1000	mA
Junction temperature, T_J		–30	125	°C
Ambient temperature, T_A⁽²⁾		−30	90	°C

(1) All voltages are with respect to the potential at the GND pins

(2) In applications where high-power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be de-rated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 125°C), the maximum power dissipation of the device in the application (P_D-MAX), and the junction-to ambient thermal resistance of the part/package in the application (R_θJA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (R_θJA × P_D-MAX).

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LM3262	UNIT
		YFQ (DSBGA)
		9 PINS
R_θJA	Junction-to-ambient thermal resistance	85	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Unless otherwise noted, all specifications apply to the Typical Application Circuit with: V_IN = EN = 3.6 V and
BPEN = NC = 0 V. All typical (TYP) limits apply for T_A = T_J = 25°C, and all minimum (MIN) and maximum (MAX) apply over the full operating ambient temperature range (−30°C ≤ T_A = T_J ≤ +90°C), unless otherwise specified.⁽¹⁾⁽²⁾⁽³⁾

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_{FB, MIN}	Feedback voltage at minimum setting	PWM mode, VCON = 0.16 V⁽⁴⁾	0.38	0.4	0.42	V
V_{FB, MAX}	Feedback voltage at maximum setting	PWM mode, VCON = 1.44 V, V_IN = 4 V	3.55	3.6	3.65	V
I_SHDN	Shutdown supply current	EN = SW = VCON = FB = BPEN = NC =0 V⁽⁵⁾		0.1	1	µA
I_{Q_PWM}	PWM mode quiescent current	PWM mode, No switching VCON = 0.13 V, FB = 1 V⁽⁶⁾		650	795	µA
I_{Q_SLEEP}	Low-power sleep mode	EN = VIN, BPEN = NC = 0V, SW = tri state VCON < 0.8 V, FB = 2.05 V⁽⁷⁾		25		µA
I_{Q_ECO}	ECO mode quiescent current	ECO mode, No switching VCON = 0.8 V, FB = 2.05 V⁽⁶⁾		60		µA
I_LIM,P	PFET switch peak current limit	See⁽⁸⁾	1300	1450	1600	mA
I_{LIM, BP}	BPFET switch peak current limit	V_FB = V_IN – 1 V	310	400		mA
ƒ_OSC	Internal oscillator frequency		5.7	6	6.3	MHz
V_IH	EN, BPEN logic high input threshold		1.2			V
V_IL	EN, BPEN logic low input threshold				0.4	V
Gain	VCON to V_OUT gain	0.16 V ≤ VCON ≤ 1.44 V⁽⁹⁾		2.5		V/V
I_VCON	VCON pin leakage current	VCON = 1 V	–1		1	µA
V_{BP, NEG}	Auto bypass detection negative threshold	VCON = 1.2 V (V_OUT-SET = 3 V) V_IN = 3.2 V, R_L = 6 Ω (I_OUT = 500 mA)⁽¹⁰⁾	165	200	235	mV
V_{BP, NEG}	Auto bypass detection positive threshold	VCON = 1.2 V (V_OUT-SET = 3 V) V_IN = 3.25 V, R_L = 6 Ω (I_OUT = 500 mA)⁽¹¹⁾	215	250	285	mV
I_{BP, SLEW}		BPEN = High, Forced bypass		1600		mA

(1) All voltages are with respect to the potential at the GND pins.

(2) Minimum and maximum limits are specified by design, test, or statistical analysis.

(3) The parameters in the electrical characteristics table are tested under open loop conditions at V_IN = 3.6 V unless otherwise specified. For performance over the input voltage range and closed-loop results, refer to Typical Characteristics.

(4) All 0.4-V V_OUT specifications are at steady-state only.

(5) Shutdown current includes leakage current of PFET.

(6) I_q specified here is when the device is not switching. For operating input current at no load, refer to Typical Characteristics.

(7) FB has 200 kΩ to SGND.

(8) Current limit is built-in, fixed, and not adjustable.

(9) Care should be taken to keep the VCON pin voltage less than the VIN pin voltage as this can place the device into a manufacturing test mode.

(10) Entering bypass mode, V_IN is compared to the programmed output voltage (2.5 × VCON). When V_IN − (2.5 × VCON) falls below V_BP,NEG longer than T_BP,NEG, the bypass FET turns on, and the switching FET turns on.

(11) Bypass mode is exited when V_IN − (2.5 × VCON) exceeds V_BP,POS longer than T_BP,POS, and PWM mode resumes. The hysteresis for the bypass detection threshold V_BP,POS − V_BP,NEG is always positive and is approximately 50 mV.

6.6 System Characteristics

The following parameters are specified by design and verifications providing the component values in the Typical Application Circuit are used. These parameters are not verified by production testing. Minimum (MIN) and maximum (MAX) values are specified over the ambient temperature range T_A = −30°C ≤ T_A ≤ +90°C and over the V_IN range = 2.5 V to 5.5 V, unless otherwise specified; L = 0.5 μH, DCR = 50 mΩ, C_IN = 10 μF, 6.3 V, 0402 (1005), C_OUT = 4.7 μF, 6.3 V, 0402 (1005). For bench evaluation, see ⁽¹⁾.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
D	Maximum duty cycle	MODE = LOW	100%
I_OUT	Maximum output current capability	2.5 V ≤ V_IN ≤ 5.5 V 2.5 × VCON ≤ V_IN – 285 mV	800			mA
I_OUT	Maximum output current capability	2.5 V ≤ V_IN ≤ 5.5 V 2.5 × VCON ≤ V_IN – 165 mV, bypass mode	1000			mA
V_OUT linearity	VCON = 0.16 V to 1.44 V	0 mA ≤ I_OUT≤ 800 mA⁽²⁾	–3%		3%
V_OUT linearity	VCON = 0.16 V to 1.44 V	0 mA ≤ I_OUT≤ 800 mA⁽²⁾	–50		50	mV
η	Efficiency	V_IN = 3.8 V, V_OUT = 0.8 V I_OUT = 10 mA, ECO mode		71%
		V_IN = 3.8 V, V_OUT = 2.5 V I_OUT = 200 mA, PWM mode		92%
		V_IN = 3.8 V, V_OUT = 3.4 V I_OUT = 500 mA, PWM mode		93%
LINE_tr	Line transient response	V_IN = 3.6 V to 4.2 V, T_R= T_F = 10 µs, I_OUT = 100 mA, V_OUT = 0.8 V		50		mVpk
LOAD_tr	Load transient response	V_IN = 3.1/3.6/4.5 V, V_OUT = 0.8 V I_OUT = 50 mA to 150 mA T_R= T_F = 10 µs,		50		mVpk

(1) When the LM3262 device is being evaluated apart from a normal system design or on a PCB other than the TI LM3262 evaluation module, user should ensure that a 50-µF to 100-μF ceramic input capacitor is added to the PCB to keep input voltage from sagging during rapid load transitions.

(2) Linearity limits are ±3% or ±50 mV, whichever is larger. V_OUT is monotonic in nature with respect to VCON input.

6.7 Timing Requirements

		NOM	MAX	UNIT
T_{VCON_TR}	V_OUT rise time VCON change to 90%; V_IN = 3.7 V, V_OUT = 1.4 V to 3.4 V 0.1 µs < VCON_T_R < 1 µs, RL = 12 Ω	5		µs
T_{VCON_TR}	V_OUT fall time VCON change to 10%; V_IN = 3.7 V, V_OUT = 3.4 V to 1.4 V 0.1 µs < VCON_T_R < 1 µs, RL = 12 Ω	5		µs
T_ON	Turnon time (time for output to reach 95% final value after Enable low-to-high transition) EN = low-to-high, V_IN = 4.2 V , V_OUT = 3.4 V I_OUT ≤ 1 mA, COUT = 4.7 µF		50	µs
T_{BP, NEG}	Auto bypass detect negative threshold delay time⁽¹⁾	10		µs
T_{BP, POS}	Auto bypass detect positive threshold delay time⁽²⁾	0.1		µs

(1) Entering bypass mode, V_IN is compared to the programmed output voltage (2.5 × VCON). When V_IN − (2.5 × VCON) falls below V_{BP, NEG} longer than T_{BP, NEG}, the bypass FET turns on, and the switching FET turns on.

(2) Bypass mode is exited when V_IN − (2.5 × VCON) exceeds V_{BP, POS} longer than T_{BP, POS}, and PWM mode resumes. The hysteresis for the bypass detection threshold V_{BP, POS} − V_{BP, NEG} is always positive and will be approximately 50 mV.