SNVSB96 July   2019 LM3424-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
    1.     Typical Boost Application Circuit
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Current Regulators
      2. 7.3.2  Peak Current Mode Control
      3. 7.3.3  Average LED Current
      4. 7.3.4  Thermal Foldback and Analog Dimming
      5. 7.3.5  Current Sense and Current Limit
      6. 7.3.6  Slope Compensation
      7. 7.3.7  Control Loop Compensation
      8. 7.3.8  Start-Up Regulator and Soft-Start
      9. 7.3.9  Overvoltage Lockout (OVLO)
      10. 7.3.10 Input Undervoltage Lockout (UVLO)
        1. 7.3.10.1 UVLO Only
        2. 7.3.10.2 PWM Dimming and UVLO
      11. 7.3.11 PWM Dimming
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Inductor
      2. 8.1.2 LED Dynamic Resistance
      3. 8.1.3 Output Capacitor
      4. 8.1.4 Input Capacitors
      5. 8.1.5 Main MOSFET and Dimming MOSFET
      6. 8.1.6 Re-Circulating Diode
      7. 8.1.7 Switching Frequency
    2. 8.2 Typical Applications
      1. 8.2.1 Basic Topology Schematics
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Operating Point
          2. 8.2.1.2.2  Switching Frequency
          3. 8.2.1.2.3  Average LED Current
          4. 8.2.1.2.4  Thermal Foldback
          5. 8.2.1.2.5  Inductor Ripple Current
          6. 8.2.1.2.6  LED Ripple Current
          7. 8.2.1.2.7  Peak Current Limit
          8. 8.2.1.2.8  Slope Compensation
          9. 8.2.1.2.9  Loop Compensation
          10. 8.2.1.2.10 Input Capacitance
          11. 8.2.1.2.11 NFET
          12. 8.2.1.2.12 Diode
          13. 8.2.1.2.13 Output OVLO
          14. 8.2.1.2.14 Input UVLO
          15. 8.2.1.2.15 Soft-Start
          16. 8.2.1.2.16 PWM Dimming Method
          17. 8.2.1.2.17 Analog Dimming Method
      2. 8.2.2 Buck-Boost Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Operating Point
          2. 8.2.2.2.2  Switching Frequency
          3. 8.2.2.2.3  Average LED Current
          4. 8.2.2.2.4  Thermal Foldback
          5. 8.2.2.2.5  Inductor Ripple Current
          6. 8.2.2.2.6  Output Capacitance
          7. 8.2.2.2.7  Peak Current Limit
          8. 8.2.2.2.8  Slope Compensation
          9. 8.2.2.2.9  Loop Compensation
          10. 8.2.2.2.10 Input Capacitance
          11. 8.2.2.2.11 NFET
          12. 8.2.2.2.12 Diode
          13. 8.2.2.2.13 Input UVLO
          14. 8.2.2.2.14 Output OVLO
          15. 8.2.2.2.15 Soft-Start
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Boost Application
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
      4. 8.2.4 Buck-Boost Application
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedures
      5. 8.2.5 Boost Application
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Detailed Design Procedure
      6. 8.2.6 Buck-Boost Application
        1. 8.2.6.1 Design Requirements
        2. 8.2.6.2 Detailed Design Procedure
      7. 8.2.7 Buck Application
        1. 8.2.7.1 Design Requirements
        2. 8.2.7.2 Detailed Design Procedure
      8. 8.2.8 Buck-Boost Application
        1. 8.2.8.1 Design Requirements
        2. 8.2.8.2 Detailed Design Procedure
      9. 8.2.9 SEPIC Application
        1. 8.2.9.1 Design Requirements
        2. 8.2.9.2 Detailed Design Procedure
  9. Power Supply Recommendations
    1. 9.1 Input Supply Current Limit
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Current Sense and Current Limit

The LM3424-Q1 achieves peak current mode control using a comparator that monitors the main MOSFET (Q1) transistor current, comparing it with the COMP pin voltage as shown in Figure 22. Further, it incorporates a cycle-by-cycle over-current protection function. Current limit is accomplished by a redundant internal current sense comparator. If the voltage at the current sense comparator input (IS) exceeds 245 mV (typical), the on cycle is immediately terminated. The IS input pin has an internal N-channel MOSFET which pulls it down at the conclusion of every cycle. The discharge device remains on an additional 240 ns (typical) after the beginning of a new cycle to blank the leading edge spike on the current sense signal. The leading edge blanking (LEB) determines the minimum achievable on-time (tON-MIN).

LM3424-Q1 lm3424-q1-diagram-18-snvs603.gifFigure 22. Current Sense / Current Limit Circuitry

There are two possible methods to sense the transistor current. The RDS-ON of the main power MOSFET can be used as the current sense resistance because the IS pin was designed to withstand the high voltages present on the drain when the MOSFET is in the off state. Alternatively, a sense resistor located in the source of the MOSFET may be used for current sensing, however a low inductance (ESL) type is suggested. The cycle-by-cycle current limit (ILIM) can be calculated using either method as the limiting resistance (RLIM):

Equation 12. LM3424-Q1 30085747.gif

In general, the external series resistor allows for more design flexibility, however it is important to ensure all of the noise sensitive low power ground connections are connected together local to the controller and a single connection is made to GND.