JAJSFC4 April   2018 LM3478Q-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      一般的な高効率昇圧(ブースト)コンバータ
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings - LM3478Q-Q1
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Overvoltage Protection
      2. 7.3.2 Slope Compensation Ramp
      3. 7.3.3 Frequency Adjust/Shutdown
      4. 7.3.4 Short-Circuit Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical High Efficiency Step-Up (Boost) Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design with WEBENCH Tools
          2. 8.2.1.2.2  Power Inductor Selection
          3. 8.2.1.2.3  Programming the Output Voltage
          4. 8.2.1.2.4  Setting the Current Limit
          5. 8.2.1.2.5  Current Limit with External Slope Compensation
          6. 8.2.1.2.6  Power Diode Selection
          7. 8.2.1.2.7  Power MOSFET Selection
          8. 8.2.1.2.8  Input Capacitor Selection
          9. 8.2.1.2.9  Output Capacitor Selection
          10. 8.2.1.2.10 Compensation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical SEPIC Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Power MOSFET Selection
          2. 8.2.2.2.2 Power Diode Selection
          3. 8.2.2.2.3 Selection of Inductors L1 and L2
          4. 8.2.2.2.4 Sense Resistor Selection
          5. 8.2.2.2.5 Sepic Capacitor Selection
          6. 8.2.2.2.6 Input Capacitor Selection
          7. 8.2.2.2.7 Output Capacitor Selection
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 WEBENCHツールによるカスタム設計
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 ドキュメントのサポート
      1. 11.3.1 関連資料
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.1.2.4 Setting the Current Limit

The maximum amount of current that can be delivered to the load is set by the sense resistor, RSEN. Current limit occurs when the voltage that is generated across the sense resistor equals the current sense threshold voltage, VSENSE. When this threshold is reached, the switch will be turned off until the next cycle. Limits for VSENSE are specified in the electrical characteristics section. VSENSE represents the maximum value of the internal control signal VCS as shown in Figure 30. This control signal, however, is not a constant value and changes over the course of a period as a result of the internal compensation ramp (VSL). Therefore the current limit threshold will also change. The actual current limit threshold is a function of the sense voltage (VSENSE) and the internal compensation ramp:

Equation 16. RSEN x ISWLIMIT = VCSMAX = VSENSE - (D x VSL)

Where ISWLIMIT is the peak switch current limit, defined by Equation 17.

LM3478Q-Q1 10135552.gifFigure 30. Current Sense Voltage vs Duty Cycle

Figure 30 shows how VCS (and current limit threshold voltage) change with duty cycle. The curve is equivalent to the internal compensation ramp slope (Se) and is bounded at low duty cycle by VSENSE, shown as a dotted line. As duty cycle increases, the control voltage is reduced as VSL ramps up. The graph also shows the short circuit current limit threshold of 343 mV (typical) during the 325 ns (typical) blanking time. For higher frequencies this fixed blanking time obviously occupies more duty cycle, percentage wise. Since current limit threshold varies with duty cycle, the use Equation 17 to select RSEN and set the desired current limit threshold:

Equation 17. LM3478Q-Q1 10135591.gif

The numerator of Equation 17 is VCS, and ISWLIMIT using Equation 18.

Equation 18. LM3478Q-Q1 10135592.gif

To avoid false triggering, the current limit value should have some margin above the maximum operating value, typically 120%. Values for both VSENSE and VSL are specified in Electrical Characteristics. However, calculating with the limits of these two specs could result in an unrealistically wide current limit or RSEN range. Therefore, Equation 19 is recommended, using the VSL ratio value given in Electrical Characteristics.

Equation 19. LM3478Q-Q1 10135596.gif

RSEN is part of the current mode control loop and has some influence on control loop stability. Therefore, once the current limit threshold is set, loop stability must be verified. As described in the slope compensation section, Equation 20 must hold true for a current mode converter to be stable.

Equation 20. Sf - Se< Sn + Se

To verify that this equation holds true, use Equation 21.

Equation 21. LM3478Q-Q1 10135597.gif

If the selected RSEN is greater than this value, additional slope compensation must be added to ensure stability, as described in the section below.