JAJSFC4 April   2018 LM3478Q-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      一般的な高効率昇圧(ブースト)コンバータ
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings - LM3478Q-Q1
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Overvoltage Protection
      2. 7.3.2 Slope Compensation Ramp
      3. 7.3.3 Frequency Adjust/Shutdown
      4. 7.3.4 Short-Circuit Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical High Efficiency Step-Up (Boost) Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design with WEBENCH Tools
          2. 8.2.1.2.2  Power Inductor Selection
          3. 8.2.1.2.3  Programming the Output Voltage
          4. 8.2.1.2.4  Setting the Current Limit
          5. 8.2.1.2.5  Current Limit with External Slope Compensation
          6. 8.2.1.2.6  Power Diode Selection
          7. 8.2.1.2.7  Power MOSFET Selection
          8. 8.2.1.2.8  Input Capacitor Selection
          9. 8.2.1.2.9  Output Capacitor Selection
          10. 8.2.1.2.10 Compensation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical SEPIC Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Power MOSFET Selection
          2. 8.2.2.2.2 Power Diode Selection
          3. 8.2.2.2.3 Selection of Inductors L1 and L2
          4. 8.2.2.2.4 Sense Resistor Selection
          5. 8.2.2.2.5 Sepic Capacitor Selection
          6. 8.2.2.2.6 Input Capacitor Selection
          7. 8.2.2.2.7 Output Capacitor Selection
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 WEBENCHツールによるカスタム設計
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 ドキュメントのサポート
      1. 11.3.1 関連資料
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.2.3 Selection of Inductors L1 and L2

Proper selection of inductors L1 and L2 to maintain continuous current conduction mode requires calculations of the following parameters.

Average current in the inductors can be calculated using Equation 39.

Equation 39. LM3478Q-Q1 10135571.png
Equation 40. IL2AVE = IOUT

Peak to peak ripple current, to calculate core loss if necessary using Equation 41 and Equation 42.

Equation 41. LM3478Q-Q1 10135576.png
Equation 42. LM3478Q-Q1 10135577.png

Maintaining the condition IL> ΔiL/2 to ensure continuous current conduction yields Equation 43 and Equation 44.

Equation 43. LM3478Q-Q1 10135572.gif
Equation 44. LM3478Q-Q1 10135573.gif

Peak current in the inductor, use Equation 45 and Equation 46 to ensure the inductor does not saturate.

Equation 45. LM3478Q-Q1 10135574.png
Equation 46. LM3478Q-Q1 10135575.png

IL1PK must be lower than the maximum current rating set by the current sense resistor.

The value of L1 can be increased above the minimum recommended to reduce input ripple and output ripple. However, once DIL1 is less than 20% of IL1AVE, the benefit to output ripple is minimal.

By increasing the value of L2 above the minimum recommended, ΔIL2 can be reduced, which in turn will reduce the output ripple voltage:

Equation 47. LM3478Q-Q1 10135578.gif

where ESR is the effective series resistance of the output capacitor.

If L1 and L2 are wound on the same core, then L1 = L2 = L. All of the previous equations will hold true if the inductance is replaced by 2L.