10.1.1 Output Capacitor Placement

The output capacitor is in the path of the inductor current discharge current. As a result, C_OUT sees a high current step from 0 to I_PEAK each time the switch turns off and the Schottky diode turns on. Typical turnoff/turnon times are around 5 ns. Any inductance along this series path from the cathode of the diode through C_OUT and back into the LM3532's GND pin contributes to voltage spikes (V_SPIKE = L_PX × dI/dt) at SW and OUT which can potentially over-voltage the SW pin, or feed through to GND. To avoid this, C_OUT+ must be connected as close as possible to the Cathode of the Schottky diode and C_OUT− must be connected as close as possible to the LM3532's GND bump. The best placement for C_OUT is on the same layer as the LM3532 to avoid any vias that add extra series inductance (see Layout Examples).

10.1.2 Schottky Diode Placement

The Schottky diode is in the path of the inductor current discharge. As a result the Schottky diode sees a high current step from 0 to I_PEAK each time the switch turns off and the diode turns on. Any inductance in series with the diode causes a voltage spike (V_SPIKE = L_PX × dI/dt) at SW and OUT which can potentially over-voltage the SW pin, or feed through to VOUT and through the output capacitor and into GND. Connecting the anode of the diode as close as possible to the SW pin and the cathode of the diode as close as possible to COUT+ reduces the inductance (L_PX) and minimize these voltage spikes (see Layout Examples).

10.1.3 Inductor Placement

The node where the inductor connects to the LM3532’s SW bump has 2 issues. First, a large switched voltage (0 to V_OUT + V_{F_SCHOTTKY}) appears on this node every switching cycle. This switched voltage can be capacitively coupled into nearby nodes. Second, there is a relatively large current (input current) on the traces connecting the input supply to the inductor and connecting the inductor to the SW bump. Any resistance in this path can cause large voltage drops that negatively affect efficiency.

To reduce the capacitively coupled signal from SW into nearby traces, the SW bump to inductor connection must be minimized in area. This limits the PCB capacitance from SW to other traces. Additionally, other nodes need to be routed away from SW and not directly beneath. This is especially true for high impedance nodes that are more susceptible to capacitive coupling such as (SCL, SDA, HWEN, PWM, and possibly ASL1 and ALS2). A GND plane placed directly below SW helps isolate SW and dramatically reduce the capacitance from SW into nearby traces.

To limit the trace resistance of the VBATT to inductor connection and from the inductor to SW connection, use short, wide traces (see Layout Examples).

10.1.4 Input Capacitor Selection and Placement

The input bypass capacitor filters the inductor current ripple, and the internal MOSFET driver currents during turn on of the power switch.

The driver current requirement can be a few hundred milliamps with 5 ns rise and fall times. This appears as high dI/dt current pulses coming from the input capacitor each time the switch turns on. Close placement of the input capacitor to the IN pin and to the GND pin is critical because any series inductance between IN and C_IN+ or C_IN− and GND can create voltage spikes that could appear on the V_IN supply line and in the GND plane.

Close placement of the input bypass capacitor at the input side of the inductor is also critical. The source impedance (inductance and resistance) from the input supply, along with the input capacitor of the LM3532, form a series RLC circuit. If the output resistance from the source (R_S) is low enough the circuit is underdamped and has a resonant frequency (typically the case). Depending on the size of L_S the resonant frequency could occur below, close to, or above the LM3532's switching frequency. This can cause the supply current ripple to be:

• Approximately equal to the inductor current ripple when the resonant frequency occurs well above the LM3532's switching frequency;
• Greater then the inductor current ripple when the resonant frequency occurs near the switching frequency; or
• Less then the inductor current ripple when the resonant frequency occurs well below the switching frequency.

Figure 45 shows this series RLC circuit formed from the output impedance of the supply and the input capacitor. The circuit is re-drawn for the AC case where the V_IN supply is replaced with a short to GND and the LM3532 + Inductor is replaced with a current source (ΔI_L).

Equation 1 is the criteria for an underdamped response. Equation 2 is the resonant frequency. Equation 3 is the approximated supply current ripple as a function of L_S, R_S, and C_IN.

As an example, consider a 3.6-V supply with 0.1 Ω of series resistance connected to C_IN through 50 nH of connecting traces. This results in an underdamped input filter circuit with a resonant frequency of 712 kHz. Because the switching frequency lies near to the resonant frequency of the input RLC network, the supply current is probably larger then the inductor current ripple. In this case, using equation 3 from Figure 45, the supply current ripple can be approximated as 1.68 times the inductor current ripple. Increasing the series inductance (L_S) to 500 nH causes the resonant frequency to move to around 225 kHz and the supply current ripple to be approximately 0.25 times the inductor current ripple.

Figure 45. Input RLC Network