6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
|
MIN |
MAX |
UNIT |
VIN, VSW ,VOUT |
–0.3 |
6 |
V |
VSCL, VSDA, VENABLE, VSTROBE, VTX, VTORCH, VLED, VTEMP |
−0.3 V to the lesser of (VIN + 0.3 V) w/ 6 V maximum |
|
Continuous power dissipation(3) |
Internally limited |
|
Junction temperature, TJ-MAX |
|
150 |
°C |
Maximum lead temperature (soldering) |
See(4) |
°C |
Storage temperature, Tstg |
–65 |
150 |
°C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to the potential at the GND pin.
(3) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150°C (typical) and disengages at TJ = 135°C (typical). Thermal shutdown is ensured by design.
(4) For detailed soldering specifications and information, refer to Texas Instruments Application Note 1112:
DSBGA Wafer Level chip Scale Package (
SNVA009).
6.2 ESD Ratings
|
VALUE |
UNIT |
V(ESD) |
Electrostatic discharge |
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) |
±1000 |
V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) |
±250 |
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)(2)
|
MIN |
NOM |
MAX |
UNIT |
VIN |
2.5 |
|
5.5 |
V |
Junction temperature, TJ |
−40 |
|
125 |
°C |
Ambient temperature, TA(2) |
−40 |
|
85 |
°C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the part/package in the application (RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX).
6.4 Thermal Information
THERMAL METRIC(1) |
LM3556 |
UNIT |
YFQ (DSBGA) |
16 PINS |
RθJA(2) |
Junction-to-ambient thermal resistance |
60 |
°C/W |
(1) For more information about traditional and new thermal metrics, see the
Semiconductor and IC Package Thermal Metrics application report,
SPRA953.
(2) Junction-to-ambient thermal resistance (RθJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm × 76 mm × 1.6 mm with a 2 × 1 array of thermal vias. The ground plane on the board is 50 mm × 50 mm. Thickness of copper layers are 36 µm/18 µm/18 µm/36 µm (1.5 oz/1 oz/1 oz/1.5 oz). Ambient temperature in simulation is 22°C, still air. Power dissipation is 1 W.
6.5 Electrical Characteristics
Unless otherwise specified, VIN = 3.6 V, typical limits apply for TA = 25°C, and minimum (MIN) and maximum (MAX) limits apply over the full operating ambient temperature range (−40°C ≤ TA ≤ +85°C).(1)(2)
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNIT |
CURRENT SOURCE SPECIFICATIONS |
ILED |
Current source accuracy |
1.5-A Flash, VOUT = 4 V |
1.425 (–5%) |
1.5 |
1.575 (+5%) |
A |
46.88-mA Torch, VOUT = 3.6 V |
42.3 (−10%) |
47 |
51.7 (+10%) |
mA |
VHR |
Current source regulation voltage |
ILED = 1.5 A |
Flash |
|
250 |
280 (+12%) |
mV |
ILED = 46.88 mA |
Torch |
|
150 |
172.5 (+15%) |
VOVP |
Output overvoltage protection trip point |
ON Threshold |
4.86 |
5 |
5.1 |
V |
OFF Threshold |
4.75 |
4.88 |
4.99 |
STEP-UP DC-DC CONVERTER SPECIFICATIONS |
RPMOS |
PMOS switch on-resistance |
IPMOS = 1 A |
|
85 |
|
mΩ |
RNMOS |
NMOS switch on-resistance |
INMOS = 1 A |
|
65 |
|
ICL |
Switch current limit |
|
−12% |
1.7 |
12% |
A |
−12% |
1.9 |
12% |
−10% |
2.5 |
10% |
−12% |
3.1 |
12% |
VTRIP |
NTC comparator trip threshold |
Configuration Register, bit [1] = 1 |
−6% |
600 |
6% |
mV |
UVLO |
Undervoltage lockout threshold |
Falling VIN |
2.74 |
2.8 |
2.85 |
V |
INTC |
NTC current |
|
−6% |
75 |
6% |
µA |
VIVFM |
Input voltage flash monitor trip threshold |
|
–3.2% |
2.9 |
3.2% |
V |
ƒSW |
Switching frequency |
2.5 V ≤ VIN ≤ 5.5 V |
3.72 |
4 |
4.28 |
MHz |
IQ |
Quiescent supply current |
Device not switching Pass Mode |
|
0.6 |
0.75 |
mA |
ISD |
Shutdown supply current |
Device disabled, EN = 0V 2.5 V ≤ VIN ≤ 5.5 V |
|
0.1 |
1.3 |
µA |
ISB |
Standby supply current |
Device disabled, EN = 2 V 2.5 V ≤ VIN ≤ 5.5 V |
|
2.5 |
4 |
µA |
tTX |
Flash-to-torch LED current settling time |
TX low to high, ILED = 1.5 A to 46.88 mA |
|
4 |
|
µs |
IOS |
ILED overshoot in external indicator mode |
0 mA to ITORCH |
|
8% |
|
|
ENABLE, STROBE, TORCH, TX VOLTAGE SPECIFICATIONS |
VIL |
Input logic low |
2.5 V ≤ VIN ≤ 5.5 V |
0 |
|
0.4 |
V |
VIH |
Input logic high |
1.2 |
|
VIN |
I2C-COMPATIBLE INTERFACE SPECIFICATIONS (SCL, SDA) |
VIL |
Input logic low |
2.5 V ≤ VIN ≤ 4.2 V |
0 |
|
0.4 |
V |
VIH |
Input logic high |
1.2 |
|
VIN |
VOL |
Output logic low |
ILOAD = 3 mA |
|
|
400 |
mV |
(1) Minimum and maximum limits are specified by design, test, or statistical analysis. Typical numbers are not verified, but do represent the most likely norm. Unless otherwise specified, conditions for typical specifications are: VIN = 3.6 V and TA = 25°C.
(2) All voltages are with respect to the potential at the GND pin.
6.6 Timing Requirements
|
MIN |
NOM |
MAX |
UNIT |
t1 |
SCL clock frequency |
2.4 |
|
|
µs |
t2 |
Data in setup time to SCL high |
100 |
|
|
ns |
t3 |
Data out stable after SCL low |
0 |
|
|
ns |
t4 |
SDA low setup time to SCL low (start) |
100 |
|
|
ns |
t5 |
SDA high hold time after SCL high (stop) |
100 |
|
|
ns |
Figure 1. I2C-Compatible Timing Diagram
6.7 Typical Characteristics