SNOSB43C September   2011  – November 2016 LM3560

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Specifications (SCL, SDA)
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Amplifier Synchronization (Tx1)
        1. 7.3.1.1 TX1 Shutdown
      2. 7.3.2 Independent LED Control
      3. 7.3.3 Hardware Torch
      4. 7.3.4 Fault Protections
        1. 7.3.4.1 Overvoltage Protection
        2. 7.3.4.2 Current Limit
        3. 7.3.4.3 Flash Timeout
        4. 7.3.4.4 Indicator LED/Thermistor (LED1/NTC)
          1. 7.3.4.4.1 Message Indicator Current Source (LEDI/NTC)
            1. 7.3.4.4.1.1 Message Indicator Example 1 (Single Pulse With Dead Time):
            2. 7.3.4.4.1.2 Message Indicator Example 2 (Multiple Pulses With Dead Time):
          2. 7.3.4.4.2 Updating The Message Indicator
      5. 7.3.5 Input Voltage Monitor
        1. 7.3.5.1 Input Voltage Flash Monitor (Flash Current Rising)
      6. 7.3.6 Last Flash Register
      7. 7.3.7 LED Voltage Monitor
      8. 7.3.8 ADC Delay
      9. 7.3.9 Flags Register and Fault Indicators
        1. 7.3.9.1 Flash Timeout
        2. 7.3.9.2 Thermal Shutdown
        3. 7.3.9.3 LED Fault
        4. 7.3.9.4 TX1 and TX2 Interrupt Flags
        5. 7.3.9.5 LED Thermal Fault (NTC Flag)
        6. 7.3.9.6 VIN Flash Monitor Fault
        7. 7.3.9.7 VIN Monitor Fault
    4. 7.4 Device Functional Modes
      1. 7.4.1  Start-Up (Enabling the Device)
      2. 7.4.2  Pass Mode
      3. 7.4.3  Flash Mode
      4. 7.4.4  Torch Mode
      5. 7.4.5  Privacy Indicator Mode
      6. 7.4.6  GPIO1 Mode
      7. 7.4.7  TX2/INT/GPIO2
      8. 7.4.8  TX2 Mode
        1. 7.4.8.1 TX2 Shutdown
      9. 7.4.9  GPIO2 Mode
      10. 7.4.10 Interrupt Output (INT Mode)
      11. 7.4.11 NTC Mode
      12. 7.4.12 Alternate External Torch (AET) Mode
      13. 7.4.13 Automatic Conversion Mode
      14. 7.4.14 Manual Conversion Mode
    5. 7.5 I2C-Compatible Interface
      1. 7.5.1 START and STOP Conditions
      2. 7.5.2 I2C-Compatible Chip Address
      3. 7.5.3 Transferring Data
    6. 7.6 Register Descriptions
      1. 7.6.1  Enable Register (Address 0x10)
      2. 7.6.2  Privacy Register (Address 0x11)
      3. 7.6.3  Indicator Register (Address 0x12)
      4. 7.6.4  Indicator Blinking Register (Address 0x13)
      5. 7.6.5  Privacy PWM Period Register (Address 0x14)
      6. 7.6.6  GPIO Register (Address 0x20)
      7. 7.6.7  LED Forward Voltage ADC (VLED Monitor Register, Address 0x30)
      8. 7.6.8  ADC Delay Register (Address 0x31)
      9. 7.6.9  VIN Monitor Register (Address 0x80)
      10. 7.6.10 Last Flash Register (Address 0x81)
      11. 7.6.11 Torch Brightness Register Descriptions (Address 0xA0)
      12. 7.6.12 Flash Brightness Register (Address 0xB0)
      13. 7.6.13 Flash Duration Register (Address 0xC0)
      14. 7.6.14 Flags Register (Address 0xD0)
      15. 7.6.15 Configuration Register 1 (Address 0xE0)
      16. 7.6.16 Configuration Register 2 (Address 0xF0)
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 LM3560 Typical Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Output Capacitor Selection
          2. 8.2.1.2.2 Input Capacitor Selection
          3. 8.2.1.2.3 Inductor Selection
      2. 8.2.2 NTC Thermistor Application
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Recommendations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Specifications

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VIN, VSW, VOUT –0.3 6 V
VSCL, VSDA, VHWEN, VSTROBE, VTX1, VTX2, VLED1, VLED2, VLEDI/NTC –0.3 to the lesser of (VIN + 0.3 V) with 6 V maximum V
Continuous power dissipation(2) Internally limited
Junction temperature, TJ-MAX 150 °C
Storage temperature, Tstg –65 150 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150°C (typical) and disengages at TJ = 135°C (typical). Thermal shutdown is ensured by design.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Input voltage, VIN 2.5 5.5 V
Junction temperature, TJ –40 125 °C
Ambient temperature, TA(1) –40 85 °C
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the device package in the application (RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX).

Thermal Information

THERMAL METRIC(1) LM3560 UNIT
YZR (DSBGA)
16 PINS
RθJA Junction-to-ambient thermal resistance 71.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.4 °C/W
RθJB Junction-to-board thermal resistance 12.4 °C/W
ψJT Junction-to-top characterization parameter 0.3 °C/W
ψJB Junction-to-board characterization parameter 12.6 °C/W
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.

Electrical Characteristics

Unless otherwise specified, VIN = 3.6 V, VHWEN = VIN, TA = 25°C.(1) (2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CURRENT SOURCE SPECIFICATIONS
ILED Current source accuracy ILED1 + ILED2
3 V ≤ VIN ≤ 4.2 V
VOUT = 4.5 V
1000-mA flash current setting, per current source –3.5% 2000 3.5% mA
1000-mA flash current setting, per current source
–40°C ≤ TA ≤ 85°C
–5% 5%
31.25-mA torch current, per current source 62.5
31.25-mA torch current, per current source
–40°C ≤ TA ≤ 85°C
–10% 10%
VOUT – VLED1/2 Current source regulation voltage ILED = 2 A (ILED1 + ILED2), VOUT = 4.5 V 300 mV
VOVP Output overvoltage protection trip point(3) ON threshold 5 V
ON threshold, –40°C ≤ TA ≤ 85°C 4.925 5.075
OFF threshold 4.8
STEP-UP DC-DC CONVERTER SPECIFICATIONS
RPMOS PMOS switch on-resistance IPMOS = 1 A 80
RNMOS NMOS switch on-resistance INMOS = 1 A 65
ICL Switch current limit(4) CL bits = 00 1.6 A
CL bits = 00, 3 V ≤ VIN ≤ 4.2 V
–40°C ≤ TA ≤ 85°C
1.44 1.76
CL bits = 01 2.3
CL bits = 01, 3 V ≤ VIN ≤ 4.2 V
–40°C ≤ TA ≤ 85°C
2.02 2.58
CL bits = 10 3
CL bits = 10, 3 V ≤ VIN ≤ 4.2 V
–40°C ≤ TA ≤ 85°C
2.64 3.36
CL bits = 11 3.6
CL bits = 11, 3 V ≤ VIN ≤ 4.2 V
–40°C ≤ TA ≤ 85°C
3.17 4.03
IOUT_SC Output short-circuit current limit VOUT < 2.3 V 300 mA
ILEDI/NTC Indicator current Message indicator register, bits[2:0] = 111
VLEDI/NTC = 2 V
18 mA
Message indicator register, bits[2:0] = 111, 3 V ≤ VIN ≤ 4.2 V
VLEDI/NTC = 2 V, –40°C ≤ TA ≤ 85°C
16 20
VTRIP Comparator trip threshold Configuration register 1, bit [4] = 1, 1 V
Configuration register 1, bit [4] = 1,
3 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C
0.97 1.03
ƒSW Switching frequency 2 MHz
3 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C 1.8 2.2
tTIMEOUT Timeout duration(5)(6) 3 V ≤ VIN ≤ 4.2 V –10% 10% ms
IQ Quiescent supply current Device not switching, VOUT = 3 V 900 µA
Device switching, VOUT = 4.5 V 1.97 mA
Indicate mode, message indicator register bits [2:0] = 111 590 µA
ISHDN Shutdown supply current 3 V ≤ VIN ≤ 4.2 V 0.02 µA
3 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C 1.25
ISTBY Standby supply current 1.25 µA
3 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C 2
VIN_TH VIN monitor threshold VIN monitor register = 0x01 2.9 V
VIN monitor register = 0x01, –40°C ≤ TA ≤ 85°C 2.85 2.95
VIN_FLASH_TH VIN flash monitor threshold VIN monitor register = 0x08 2.9 V
VIN monitor register = 0x08, –40°C ≤ TA ≤ 85°C 2.85 2.95
tTX Flash-to-torch LED current settling time TX_ Low to high
ILED1 + ILED2 = 2 A to 187.5 mA
2 µs
Torch-to-flash LED current Settling TX_High to low
ILED1 + ILED2 = 187.5 mA to 2 mA
160
tD Time from when ILED hits target until VLED data is available ADC delay register bit [5] = 1 16 µs
ADC delay register bit [5] = 0
ADC delay register bits [4:0] = 0000
250
VF_ADC ADC threshold VLED monitor register bits [3:0] = 1111 4.2 V
VLED monitor register bits [3:0] = 1111
3 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C
4.05 4.35
HWEN, STROBE, TX1/TORCH/GPIO1, TX2/INT/GPIO2 VOLTAGE SPECIFICATIONS
VIL Input logic low 2.7 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C 0 0.4 V
VIH Input logic high 2.7 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C 1.2 VIN V
RPD Internal pulldown resistance on TX1, TX2, STROBE 300
I2C-COMPATIBLE VOLTAGE SPECIFICATIONS (SCL, SDA)
VIL Input logic low 2.7 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C 0 0.4 V
VIH Input logic high 2.7 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C 1.3 VIN V
VOL Output logic low (SDA) ILOAD = 3 mA
2.7 V ≤ VIN ≤ 4.2 V, –40°C ≤ TA ≤ 85°C
0.4 V
All voltages are with respect to the potential at the GND pin.
Minimum (MIN) and maximum (MAX) limits are specified by design, test, or statistical analysis. Typical (TYP) numbers represent the most likely norm. Unless otherwise stated, conditions for typical specifications are: VIN = 3.6 V and TA = 25°C.
The typical curve for overvoltage protection (OVP) is measured in closed loop using Figure 41 . The OVP value is found by forcing an open circuit in the LED1 and LED2 path and recording the peak value of VOUT. The value given in Electrical Characteristics is found in an open loop configuration by ramping the voltage at OUT until the OVP comparator trips. The closed loop data can appear higher due to the stored energy in the inductor being dumped into the output capacitor after the OVP comparator trips. Worst case is an open circuit condition where the output voltage can continue to rise after the OVP comparator trips by approximately IIN × sqrt(L/COUT).
The typical curve for current limit is measured in closed loop using Figure 41, and increasing IOUT until the peak inductor current stops increasing. The value given in Electrical Characteristics is measured open loop and is found by forcing current into SW until the current limit comparator threshold is reached. Closed loop data appears higher due to the delay between the comparator trip point and the NFET turning off. This delay allows the closed loop inductor current to ramp higher after the trip point by approximately 20 ns × VIN/L.
Specified by design. Not production tested.
The timeout period is a divided down representation of the 2-MHz clock; thus, the accuracy specification is the same as the switching frequency.

I2C Timing Specifications (SCL, SDA)

All minimum and maximum values apply over –40°C ≤ TA ≤ 85°C and are specified by design (not production tested); see(1)
MIN MAX UNIT
ƒSCL SCL (clock frequency) 0 400 kHz
tRISE Rise time of both SDA and SCL 20 ns + 0.1 × CBUS 300 ns
tFALL Fall time of both SDA and SCL 20 ns + 0.1 × CBUS 300 ns
tLOW Low period of SCL clock 1.3 µs
tHIGH High period of SCL clock 600 ns
tHD;STA Hold time for start (or repeated start) condition 600 ns
tSU:STA Set-up time for a repeated start 600 ns
tHD:DAT Data hold time 0 ns
tSU:DAT Data set-up time 100 ns
tSU:STO Set-up time for stop condition 600 ns
tVD:DAT Data valid time 900 ns
tVD;ACK Data valid acknowledge time 900 ns
tBUF Bus-free time between a start and stop condition 1.3 µs
Specified by design, not production tested.

Typical Characteristics

VIN = 3.6 V, COUT = 10 µF, CIN = 10 µF, L = 1 µH (TOKO FDSD0312-1R0, RL = 43 mΩ), TA = 25°C, ILED = ILED1 + ILED2, unless otherwise noted.
LM3560 301138109.gif
Highest 4 Flash Brightness Codes
Figure 1. ILED vs VIN, ILED1 + ILED2
LM3560 301138111.gif
Lower Middle 4 Flash Brightness Codes
Figure 3. ILED vs VIN, ILED1 + ILED2
LM3560 301138115.gif
VLED = 2.5 V Indicate Codes 100 - 111
Figure 5. Indicator Current vs Headroom Voltage
LM3560 301138114.gif
Figure 7. Switching Frequency vs VIN
LM3560 301138117.png
HWEN = GND
Figure 9. Shutdown Supply Current vs VIN
LM3560 30113892.png
VIN_FLASH_TH = 3.2 V TX2 Set For Interrupt Output (INT)
Circuit Of Figure 27 (Note 1)
Figure 11. VIN Flash Monitor Operation
LM3560 30113893.png
TX2 Set for Interrupt Output (INT) R3 = 1.3 kΩ
Circuit of Figure 42 RNTC = 10 kΩ at 25°C
NTC Set to Force Torch Mode Beta = 3380 k
Figure 13. NTC Operation
LM3560 30113895.png
Figure 15. HWEN Operation Device Enabled in Flash Mode
LM3560 301138108.gif
3.6-A Setting See Note 1
Figure 17. Closed Loop Current Limit vs VIN
LM3560 301138106.gif
2.3-A Setting See Note 2
Figure 19. Closed Loop Current Limit vs VIN
LM3560 301138110.gif
Upper Middle 4 Flash Brightness Codes
Figure 2. ILED vs VIN, ILED1 + ILED2
LM3560 301138112.gif
Lowest 4 Flash Brightness Codes
Figure 4. ILED vs VIN, ILED1 + ILED2
LM3560 301138113.gif
VLED = 2.5 V Indicate Codes 000 - 011
Figure 6. Indicator Currents vs Headroom Voltage
LM3560 301138116.gif
HWEN = VIN
Figure 8. Stand-By Supply Current vs VIN
LM3560 30113890.png
Figure 10. Strobe-to-Flash LED Current Response
LM3560 30113891.png
VIN_TH = 3.2 V TX2 Set For Interrupt Output (INT)
Circuit of Figure 27 (Note 2) Force Torch Mode
Figure 12. VIN Monitor Operation
LM3560 30113894.png
Figure 14. AET Operation
LM3560 30113896.png
Force Torch
Figure 16. TX1 Interrupt
LM3560 301138107.gif
3-A Setting See Note 1
Figure 18. Closed Loop Current Limit vs VIN
LM3560 301138105.gif
1.6-A Setting See Note 2
Figure 20. Closed Loop Current Limit vs VIN
The typical curve for current limit is measured in closed loop using Figure 41, and increasing IOUT until the peak inductor current stops increasing. The value given in Electrical Characteristics is measured open loop and is found by forcing current into SW until the current limit comparator threshold is reached. Closed loop data appears higher due to the delay between the comparator trip point and the NFET turning off. This delay allows the closed loop inductor current to ramp higher after the trip point by approximately 20 ns × VIN/L.
The typical curve for overvoltage protection (OVP) is measured in closed loop using Figure 41 . The OVP value is found by forcing an open circuit in the LED1 and LED2 path and recording the peak value of VOUT. The value given in Electrical Characteristics is found in an open loop configuration by ramping the voltage at OUT until the OVP comparator trips. The closed loop data can appear higher due to the stored energy in the inductor being dumped into the output capacitor after the OVP comparator trips. Worst case is an open circuit condition where the output voltage can continue to rise after the OVP comparator trips by approximately IIN × sqrt(L/COUT).