The LM3670 step-down DC-DC converter is optimized for powering ultralow voltage circuits from a single Li-Ion cell or three-cell NiMH/NiCd batteries. It provides up to 350-mA load current, over an input voltage range from 2.5 V to 5.5 V. There are several different fixed voltage output options available as well as an adjustable output voltage version.
The device offers superior features and performance for mobile phones and similar portable applications with complex power management systems. Automatic intelligent switching between pulse width modulation (PWM) low-noise and pulse frequency modulation (PFM) low-current mode offers improved system control. During full-power operation, a fixed-frequency 1-MHz (typical) PWM mode drives loads from approximately 70 mA to 350 mA maximum, with up to 95% efficiency. Hysteretic PFM mode extends the battery life through reduction of the quiescent current to 15 µA (typical) during light current loads and system standby. Internal synchronous rectification provides high efficiency (90% to 95% typical at loads between 1 mA and 100 mA). In shutdown mode (enable (EN) pin pulled low) the device turns off and reduces battery consumption to 0.1 µA (typical).
The LM3670 is available in a 5-pin SOT-23 package. A high switching frequency (1 MHz typical) allows use of tiny surface-mount components. Only three external surface-mount components, an inductor and two ceramic capacitors, are required.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LM3670 | SOT-23 (5) | 2.90 mm × 1.60 mm |
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Changes from E Revision (February 2013) to F Revision
Changes from D Revision (February 2013) to E Revision
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NUMBER | NAME | ||
1 | VIN | Power | Power supply input. Connect to the input filter capacitor ( Typical Application: Fixed Output). |
2 | GND | Ground | Ground pin. |
3 | EN | Digital | Enable input. |
4 | FB | Analog | Feedback analog input. Connect to the output filter capacitor (Typical Application: Fixed Output). |
5 | SW | Analog | Switching node connection to the internal PFET switch and NFET synchronous rectifier. Connect to an inductor with a saturation current rating that exceeds the 750-mA maximum switch peak current limit specification. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN pin: voltage to GND | –0.2 | 6 | V | |
EN pin: voltage to GND | –0.2 | 6 | V | |
FB, SW pins | (GND −0.2) | VIN + 0.2 | V | |
Junction temperature, TJ-MAX | –45 | 125 | °C | |
Maximum lead temperature (soldering, 10 seconds) | 260 | °C | ||
Storage temperature, Tstg | –45 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±200 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
Input voltage | 2.5 | 5.5 | A | ||
Recommended load current | 0 | 350 | mA | ||
Junction temperature, TJ | –40 | 125 | °C | ||
Ambient temperature, TA | –40 | 85 | °C |
THERMAL METRIC(1) | LM3670 | UNIT | |
---|---|---|---|
DBV (SOT-23) | |||
5 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 163.3 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 114.3 | °C/W |
RθJB | Junction-to-board thermal resistance | 26.8 | °C/W |
ψJT | Junction-to-top characterization parameter | 12.4 | °C/W |
ψJB | Junction-to-board characterization parameter | 26.3 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VIN | Input voltage | See(1) | 2.5 | 5.5 | V | |
VOUT | Fixed output voltage: 1.2 V | 2.5 V ≤ VIN ≤ 5.5 V IOUT = 10 mA |
–2% | 4% | ||
2.5 V ≤ VIN ≤ 5.5 V 0 mA ≤ IOUT ≤ 150 mA |
–4.5% | 4% | ||||
Fixed output voltage: 1.5 V | 2.5 V ≤ VIN ≤ 5.5 V IOUT = 10 mA |
–2.5% | 4% | |||
2.5 V ≤ VIN ≤ 5.5 V 0 mA ≤ IOUT ≤ 350 mA |
–5% | 4% | ||||
Fixed output voltage: 1.6 V, 1.875 V | 2.5 V ≤ VIN ≤ 5.5 V IOUT = 10 mA |
–2.5% | 4% | |||
2.5 V ≤ VIN ≤ 5.5V 0 mA ≤ IOUT ≤ 350 mA |
–5.5% | 4% | ||||
Fixed output voltage: 1.8 V | 2.5 V ≤ VIN ≤ 5.5 V IOUT = 10 mA |
–1.5% | 3% | |||
2.5 V ≤ VIN ≤ 5.5 V 0 mA ≤ IOUT ≤ 350 mA |
–4.5% | 3% | ||||
Fixed output voltage: 3.3 V | 3.6 V ≤ VIN ≤ 5.5 V IOUT = 10 mA |
–2% | 4% | |||
3.6V ≤ VIN ≤ 5.5V 0 mA ≤ IOUT ≤ 350 mA |
–6% | 4% | ||||
Adjustable output voltage(2) | 2.5 V ≤ VIN ≤ 5.5 V IOUT = 10 mA |
–2.5% | 4.5% | |||
2.5 V ≤ VIN ≤ 5.5 V 0 mA ≤ IOUT ≤ 150 mA |
–4% | 4.5% | ||||
Line_reg | Line regulation | 2.5 V ≤ VIN ≤ 5.5 V IOUT = 10 mA |
0.26 | %/V | ||
Load_reg | Load regulation | 150 mA ≤ IOUT ≤ 350 mA | 0.0014 | %/mA | ||
VREF | Internal reference voltage | 0.5 | V | |||
IQ_SHDN | Shutdown supply current | TA = 85ºC | 0.1 | 1 | µA | |
IQ | DC bias current into VIN | No load, device is not switching (VOUT forced higher than programmed output voltage) | 15 | 30 | µA | |
VUVLO | Minimum VIN below which VOUT is disabled | TA = −40°C ≤ TJ ≤ 125°C | 2.4 | V | ||
RDSON (P) | Pin-pin resistance for PFET | VIN = VGS= 3.6V | 360 | 690 | mΩ | |
RDSON (N) | Pin-pin resistance for NFET | VIN = VGS= 3.6 V | 250 | 660 | mΩ | |
ILKG (P) | P channel leakage current | VDS = 5.5 V, TA = 25°C | 0.1 | 1 | µA | |
ILKG (N) | N channel leakage current | VDS = 5.5 V, TA = 25°C | 0.1 | 1.5 | µA | |
ILIM | Switch peak current limit | 400 | 620 | 750 | mA | |
η | Efficiency | VIN = 3.6 V, VOUT = 1.8 V ILOAD = 1 mA |
91% | |||
VIN = 3.6 V, VOUT = 1.8 V ILOAD = 10 mA |
94% | |||||
VIN = 3.6 V, VOUT = 1.8 V ILOAD = 100 mA |
94% | |||||
VIN = 3.6 V, VOUT = 1.8 V ILOAD = 200 mA |
94% | |||||
VIN = 3.6 V, VOUT = 1.8 V ILOAD = 300 mA |
92% | |||||
VIN = 3.6 V, VOUT = 1.8 V ILOAD = 350 mA |
90% | |||||
VIH | Logic high input | 1.3 | V | |||
VIL | Logic low input | 0.4 | V | |||
IEN | Enable (EN) input current | 0.01 | 1 | µA | ||
ƒOSC | Internal oscillator frequency | PWM mode | 550 | 1000 | 1300 | kHz |
VIN = 2.6 V to 3.6 V | ILOAD = 100 mA |
ILOAD = 3 mA to 280 mA |
ILOAD = 350 mA |
VIN = 3.6 V to 4.6 V | ILOAD = 100 mA |
ILOAD = 0 mA to 70 mA |