9.2.2.2.1 Method 1

The saturation current must be greater than the sum of the maximum load current and the worst case average-to-peak inductor current. This can be written as:

where

Equation 2.

where

• I_RIPPLE: average-to-peak inductor current
• I_{OUT_DCDCMAX}: maximum load current (600 mA)
• V_BATT: maximum input voltage in application
• L: minimum inductor value including worst case tolerances (30% drop can be considered for Method 1)
• f: minimum switching frequency (2.55 MHz)

9.2.2.2.2 Method 2

A more conservative and recommended approach is to choose an inductor that has a saturation current rating greater than the maximum current limit of 1375 mA.

A 1-µH inductor with a saturation current rating of at least 1375 mA is recommended for most applications. Resistance of the inductor must less than 0.3 Ω for good efficiency. Table 3 lists suggested inductors and suppliers. For low-cost applications, an unshielded bobbin inductor could be considered. For noise critical applications, a toroidal or shielded- bobbin inductor should be used. A good practice is to lay out the board with overlapping footprints of both types for design flexibility. This allows substitution of a low-noise shielded inductor, in the event that noise from low-cost bobbin models is unacceptable.

9.2.2.4.1 C_{IN_DC-DC}

A ceramic input capacitor of 4.7 µF, 6.3 V is sufficient for most applications. Place the input capacitor as close as possible to the V_BATT pin of the device. A larger value may be used for improved input voltage filtering. Use X7R or X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and 0603. The minimum input capacitance to ensure good performance is 2.2 µF at 3-V DC bias; 1.5 µF at 5-V DC bias including tolerances and over ambient temperature range. The input filter capacitor supplies current to the PFET switch of the LM3686 DC-DC converter in the first half of each cycle and reduces voltage ripple imposed on the input power source. The low ESR of a ceramic capacitor provides the best noise filtering of the input voltage spikes due to this rapidly changing current. Select a capacitor with sufficient ripple current rating. The input current ripple can be calculated as:

Equation 3.

9.2.2.4.2 C_{IN_LILO}

If the LILO is used as post regulation no additional capacitor is needed at V_{IN_LILO} as the output filter capacitor of the DC-DC converter is close by and therefore sufficient.

In case of independent mode use, a 1-µF ceramic capacitor is recommended at V_{IN_LILO} if no other filter capacitor is present in the V_{IN_LILO} supply path. This capacitor must be located a distance of not more than 1 cm from the V_{IN_LILO} input pin and returned to Q_GND.

9.2.2.4.3 C_{IN_LDO}

An input capacitor is required for stability. TI recommends using a 1-µF ceramic capacitor and connected between the V_{IN_LDO} and QGND.

9.2.2.5.1 C_{OUT_DCDC}

A ceramic output capacitor of 10 µF, 6.3 V is sufficient for most applications. Use X7R or X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and 0603. DC bias characteristics vary from manufacturer to manufacturer, and DC bias curves should be requested from them as part of the capacitor selection process.

The minimum output capacitance to ensure good performance is 5.75 µF at 1.8-V DC bias including tolerances and over ambient temperature range. The output filter capacitor smooths out current flow from the inductor to the load, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low equivalent series resistance (ESR) to perform these functions.

The output voltage ripple is caused by the charging and discharging of the output capacitor and by the R_ESR and can be calculated as:

Voltage peak-to-peak ripple due to capacitance can be expressed as:

Equation 4.

Voltage peak-to-peak ripple due to ESR can be expressed as:

Because these two components are out of phase, the root mean squared (RMS) value can be used to get an approximate value of peak-to-peak ripple. The peak-to-peak ripple voltage, RMS value can be expressed as:

Equation 6.

Note that the output voltage ripple is dependent on the inductor current ripple and the ESR of the output capacitor (R_ESR). The R_ESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations is at the switching frequency of the part.

9.2.2.5.2 C_{OUT_LILO}

The linear regulator is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (dielectric types X7R, Z5U, or Y5V) in the 2.2-µF range (up to 10 µF) and with an ESR between 3 mΩ to 300 mΩ is suitable as C_{OUT_LIN} in the LM3686 application circuit.

This capacitor must be located a distance of not more than 1 cm from the V_{OUT_LILO} pin and returned to a clean analog ground. Tantalum or film capacitors may also be used at the device output, V_{OUT_LILO} but these are not as attractive for reasons of size and cost (see Table 4).

9.2.2.5.3 C_{OUT_LDO}

A ceramic capacitor in the 1-uF to 2.2-uF range, and with ESR between 5 mΩ to 500 mΩ, is suitable for the linear regulator. Connect this output capacitor no more than 1 cm from V_{OUT_LDO} and QGND.

Figure 17. Graph Showing A Typical Variation In Capacitance vs DC Bias