JAJSBG5H September   2003  – November 2018 LM5007

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Hysteretic Control Circuit Overview
      2. 7.3.2 High-Voltage Bias Supply Regulator
      3. 7.3.3 Overvoltage Comparator
      4. 7.3.4 On-Time Generator and Shutdown
      5. 7.3.5 Overcurrent Protection
      6. 7.3.6 N-Channel Buck Switch and Driver
      7. 7.3.7 Thermal Protection
      8. 7.3.8 Minimum Load Current
      9. 7.3.9 Ripple Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 Standby Mode with VIN
      2. 7.4.2 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Custom Design With Excel Quickstart Tool
        3. 8.2.2.3 Feedback Resistors, RFB1 and RFB2
        4. 8.2.2.4 Switching Frequency Selection, RON
        5. 8.2.2.5 Buck Inductor, L1
        6. 8.2.2.6 Output Capacitor, COUT
        7. 8.2.2.7 Type I Ripple Circuit, RC
        8. 8.2.2.8 Input Capacitor, CIN
        9. 8.2.2.9 Current Limit, RCL
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 WEBENCH®ツールによるカスタム設計
      3. 11.1.3 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
        1. 11.2.1.1 PCBレイアウトについてのリソース
        2. 11.2.1.2 熱設計についてのリソース
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.9 Ripple Configuration

The LM5007 uses an adaptive constant on-time (COT) control in which the conduction time of the buck MOSFET is terminated by an on-timer and the off-time is terminated by the feedback voltage (VFB) falling below the reference voltage (VREF). Therefore, for stable operation, the feedback voltage must decrease monotonically and in phase with the inductor current during the off-time interval. Furthermore, this change in feedback voltage (VFB) during the off-time must be larger than any noise component present at the feedback node.

Table 1 shows three different methods for generating appropriate voltage ripple at the feedback node. Type 1 and Type 2 ripple circuits couple the ripple at the output of the converter to the feedback node (FB). The output voltage ripple has two components:

  1. Capacitive ripple caused by the inductor current ripple charging/discharging the output capacitor.
  2. Resistive ripple caused by the inductor current ripple flowing through the ESR of the output capacitor.

The capacitive ripple is not in phase with the inductor current. As a result, the capacitive ripple does not decrease monotonically during the off-time. The resistive ripple is in phase with the inductor current and decreases monotonically during the off-time. The resistive ripple must exceed the capacitive ripple at the output node (VOUT) for stable operation. If this condition is not satisfied, unstable switching behavior is observed in COT converters with multiple on-time bursts in close succession followed by a long off-time.

Type 3 ripple method uses Rr and Cr and the switch node (SW) voltage to generate a triangular ramp. This triangular ramp is ac coupled using Cac to the feedback node (FB). Since this circuit does not use the output voltage ripple, it is ideally suited for applications where low output voltage ripple is required. See AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator Designs (SNVA166) for more details for each ripple generation method.

Table 1. Ripple Configuration

TYPE 1
LOWEST COST CONFIGURATION		 TYPE 2
REDUCED RIPPLE CONFIGURATION		 TYPE 3
MINIMUM RIPPLE CONFIGURATION
LM5007 Type I ripple schematic.gif
LM5007 Type II ripple ckt.gif
LM5007 Type III ripple ckt.gif
Equation 6. LM5007 q_Rc_nvs252.gif
Equation 7. LM5007 q_Cac_type2_nvs252.gif
Equation 8. LM5007 q_RrCr_type3_nvs252.gif