JAJSBG5H September   2003  – November 2018 LM5007

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Hysteretic Control Circuit Overview
      2. 7.3.2 High-Voltage Bias Supply Regulator
      3. 7.3.3 Overvoltage Comparator
      4. 7.3.4 On-Time Generator and Shutdown
      5. 7.3.5 Overcurrent Protection
      6. 7.3.6 N-Channel Buck Switch and Driver
      7. 7.3.7 Thermal Protection
      8. 7.3.8 Minimum Load Current
      9. 7.3.9 Ripple Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 Standby Mode with VIN
      2. 7.4.2 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Custom Design With Excel Quickstart Tool
        3. 8.2.2.3 Feedback Resistors, RFB1 and RFB2
        4. 8.2.2.4 Switching Frequency Selection, RON
        5. 8.2.2.5 Buck Inductor, L1
        6. 8.2.2.6 Output Capacitor, COUT
        7. 8.2.2.7 Type I Ripple Circuit, RC
        8. 8.2.2.8 Input Capacitor, CIN
        9. 8.2.2.9 Current Limit, RCL
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 WEBENCH®ツールによるカスタム設計
      3. 11.1.3 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
        1. 11.2.1.1 PCBレイアウトについてのリソース
        2. 11.2.1.2 熱設計についてのリソース
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DGK Package and NGT Package
8-Pin VSSOP and 8-Pin WSON
Top View
LM5007 20078302.gif

Pin Functions

PIN TYPE DESCRIPTION APPLICATION INFORMATION
NO. NAME
1 SW O Switching node. Power switching node. Connect to the LC output filter.
2 BST I Boost bootstrap capacitor input. An external capacitor is required between the BST and SW pins. A 0.01-µF ceramic capacitor is recommended. An internal diode between VCC and BST completes the buck gate drive bias network.
3 RCL I Current Limit OFF-time programming pin
tOFF = 10-5 / (0.59 + (VFB / 7.22 × 10− 6 × RCL))		 A resistor between this pin and RTN determines the variation of off-time along with the FB pin voltage per cycle while in current limit. The off-time is preset to 17 µs if FB = 0 V and decreases as the FB voltage increases.
4 RTN — Circuit ground.
5 FB I Feedback signal from regulated output. This pin is connected to the inverting input of the internal regulation comparator. The regulation threshold is 2.5 V.
6 RON I On-time set pin
tON = 1.42 × 10-10 RON / VIN 		A resistor between this pin and VIN sets the switch on-time as a function of VIN. The minimum recommended on-time is 300 ns at the maximum input voltage.
7 VCC O Output from the internal high-voltage bias regulator. VCC is nominally regulated to 7 V. If an auxiliary voltage is available to raise the voltage on this pin, above the regulation set point (7V), the internal series pass regulator will shutdown, reducing the IC power dissipation. Do not exceed 14V. This output provides gate drive power for the internal buck switch. An internal diode is provided between this pin and the BST pin. A local 0.1-uF decoupling capacitor is recommended. The series pass regulator is current limited to 10 mA.
8 VIN I Input supply voltage. Recommended operating range: 9 V to 75 V.
— EP — Exposed PAD, underside of the WSON-8 package option. Internally bonded to the die substrate. Connect to GND potential for low thermal impedance.