JAJSF96C April 2018 – October 2021 LM5036
PRODUCTION DATA
A block diagram of the hiccup mode function is shown in Figure 7-17. Both the repetitive CBC and negative current limit events will trigger hiccup mode operation in LM5036 device.
The device charges the hiccup restart capacitor with a current source IRES-SRC1 (15-µA typical) during CBC operation. The hiccup mode is activated when VRES exceeds 1 V. During hiccup mode operation, the SS and SSSR capacitors are fully discharged and the half-bridge converter remains off for a period of time (tHIC) before a new soft-start sequence is initiated.
Use Equation 26 to calculate the duration of CBC operation before entering the hiccup mode.
where
After the RES pin reaches 1.0-V, current source IRES-SRC1 (15-μA typical) is turned off and current source IRES-SRC2 (30-μA typical) is turned on which charges the RES capacitor to 4-V. Then current source IRES-DIS2 (5-μA typical) is enabled which discharges the RES capacitor to 2-V.
Use Equation 27 to calculate the hiccup mode off-time.
In addition to the repetitive CBC current limit condition, the device also enters hiccup mode if the SSSR capacitor is clamped for eight times due to repetitive negative current limit condition. The operating pattern of the hiccup mode activated by the negative current limit is similar to that activated by CBC current limit. The only difference is that at the beginning of the hiccup mode operation the RES capacitor is charged with current source IRES-SRC2 when activated by negative current limit as illustrated in Figure 7-19 whereas the RES capacitor is charged with current source IRES-SRC1 when activated by CBC current limit condition.
Once the hiccup off-timer expires, the SSSR capacitor clamp event counter will be reset. If SSSR capacitor gets clamped for less than eight times before the SSSR capacitor voltage is fully ramped up to its maximum value, the SSSR capacitor clamp event counter will also be reset. This is because the fact that SSSR capacitor voltage is able to fully ramp up to its maximum value indicates that repetitive negative current limit condition no longer exists.