SNVS565I November   2008  – August 2015 LM5085 , LM5085-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LM5085
    3. 6.3 ESD Ratings: LM5085-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Regulation Control Circuit
      2. 7.3.2  On-Time Timer
      3. 7.3.3  Shutdown
      4. 7.3.4  Current Limiting
      5. 7.3.5  Current Limit Off-Time
      6. 7.3.6  VCC Regulator
      7. 7.3.7  PGATE Driver Output
      8. 7.3.8  P-Channel MOSFET Selection
      9. 7.3.9  Soft-Start
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Standby Mode with VIN <4.5 V
      2. 7.4.2 RT Shutdown Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Components
        2. 8.2.2.2 Alternate Output Ripple Configurations
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • NGQ|8
  • DGK|8
  • DGN|8
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
VIN to GND –0.3 76 V
ISEN to GND –3 VIN + 0.3 V
ADJ to GND –0.3 VIN + 0.3 V
RT, FB to GND –0.3 7 V
VIN to VCC, VIN to PGATE –0.3 10 V
Storage temperature, Tstg –65 150 °C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Conditions are conditions under which operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.

6.2 ESD Ratings: LM5085

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 ESD Ratings: LM5085-Q1

MIN VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) ±2000 V
Charged device model (CDM), per AEC Q100-011 Corner pins (1, 4, 5, and 8) ±750
Other pins ±750
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.4 Recommended Operating Conditions

MIN MAX UNIT
VIN Voltage 4.5 75 V
Junction Temperature –40 125 °C

6.5 Thermal Information

THERMAL METRIC(1) LM5085 LM5085, LM5085-Q1 UNIT
DGK NGQ DGN
8 PINS 8 PINS 8 PINS
θJA Junction-to-ambient thermal resistance 153 44.8 54.1 °C/W
θJC(top) Junction-to-case (top) thermal resistance 52.5 39.4 49.1
θJB Junction-to-board thermal resistance 71.9 11.6 26.7
ψJT Junction-to-top characterization parameter 4.6 0.3 1.3
ψJB Junction-to-board characterization parameter 70.8 11.6 26.5
θJC(bot) Junction-to-case (bottom) thermal resistance 29 5.0 3.6
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.6 Electrical Characteristics

Typical values correspond to TJ = 25°C. Minimum and maximum limits apply over –40°C to 125°C junction temperature range unless otherwise stated. Unless otherwise stated the following conditions apply: VIN = 48 V, RT = 100kΩ.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN PIN
IIN Operating Current Non-Switching, FB = 1.4 V (2) 1.3 1.8 mA
IQ Shutdown Current RT = 0 V (2) 200 345 µA
VCC REGULATOR(1)
VCC(reg) VIN - VCC Vin = 9 V, FB = 1.4 V, ICC = 0 mA 6.9 7.7 8.5 V
Vin = 9 V, FB = 1.4 V, ICC = 20 mA 7.7 V
Vin = 75 V, FB = 1.4 V, ICC = 0 mA 7.7 V
UVLOVcc VCC Under-Voltage Lock-out Threshold VCC Increasing 3.8 V
UVLOVcc Hysteresis VCC Decreasing 260 mV
VCC(CL) VCC Current Limit FB = 1.4 V 20 40 mA
PGATE PIN
VPGATE(HI) PGATE High Voltage PGATE Pin = Open VIN -0.1 VIN V
VPGATE(LO) PGATE Low Voltage PGATE Pin = Open VCC VCC+0.1 V
VPGATE(HI)4.5 PGATE High Voltage at Vin = 4.5V PGATE Pin = Open VIN -0.1 VIN V
VPGATE(LO)4.5 PGATE Low Voltage at Vin = 4.5V PGATE Pin = Open VCC VCC+0.1 V
IPGATE Driver Output Source Current VIN = 12 V, PGATE = VIN - 3.5 V 1.75 A
Driver Output Sink Current VIN = 12 V, PGATE = VIN - 3.5 V 1.5 A
RPGATE Driver Output Resistance Source Current = 500 mA 2.3 Ω
Sink Current = 500 mA 2.3 Ω
CURRENT LIMIT DETECTION
IADJ ADJUST Pin Current Source VADJ = 46.5 V 32 40 48 µA
VCL OFFSET Current Limit Comparator Offset VADJ = 46.5 V, VADJ - VISEN -9 0 9 mV
RT PIN
RTSD Shutdown Threshold RT Pin Voltage Rising 0.73 V
RTHYS Shutdown Threshold Hysteresis 50 mV
ON-TIME
tON – 1 On-Time VIN = 4.5 V, RT = 100kΩ 3.5 5 7.15 µs
tON – 2 VIN = 48 V, RT = 100kΩ 276 360 435 ns
tON - 3 VIN = 75 V, RT = 100kΩ 177 235 285 ns
tON - 4 Minimum On-Time in Current Limit (3) VIN = 48 V, 25 mV Overdrive at ISEN 55 140 235 ns
OFF-TIME
tOFF(CL1) Off-Time (Current Limit) (3) VIN = 12 V, VFB = 0 V 5.35 7.9 10.84 µs
tOFF(CL2) VIN = 12 V, VFB = 1 V 1.42 1.9 3.03 µs
tOFF(CL3) VIN = 48 V, VFB = 0 V 16 24 32.4 µs
tOFF(CL4) VIN = 48 V, VFB = 1 V 3.89 5.7 8.67 µs
REGULATION AND OVERVOLTAGE COMPARATORS (FB PIN)
VREF FB Regulation Threshold 1.225 1.25 1.275 V
VOV FB Over-Voltage Threshold Measured with Respect to VREF 350 mV
IFB FB Bias Current 10 nA
SOFT-START FUNCTION
tSS Soft-Start Time 1.4 2.5 4.3 ms
THERMAL SHUTDOWN
TSD Junction Shutdown Temperature Junction Temperature Rising 170 °C
THYS Junction Shutdown Hysteresis 20 °C
(1) VCC provides self bias for the internal gate drive.
(2) Operating current and shutdown current do not include the current in the RT resistor.
(3) The tolerance of the minimum on-time (tON-4) and the current limit off-times (tOFF(CL1) through (tOFF(CL4)) track each other over process and temperature variations. A device which has an on-time at the high end of the range will have an off-time that is at the high end of its range.

6.7 Typical Characteristics

Unless otherwise specified the following conditions apply: TJ = 25°C, VIN = 48V.
LM5085 LM5085-Q1 30057705.png
Figure 1. Efficiency (Circuit of Figure 25)
LM5085 LM5085-Q1 30057707.png
Figure 3. Shutdown Current vs. VIN
LM5085 LM5085-Q1 30057709.png
Figure 5. VCC vs. ICC
LM5085 LM5085-Q1 30057712.png
Figure 7. Off-Time vs. VIN and VFB
LM5085 LM5085-Q1 30057717.png
Figure 9. ADJ Pin Current vs. VIN
LM5085 LM5085-Q1 30057753.png
Figure 11. Shutdown Current vs. Temperature
LM5085 LM5085-Q1 30057755.png
Figure 13. On-Time vs. Temperature
LM5085 LM5085-Q1 30057757.png
Figure 15. Off-Time vs. Temperature
LM5085 LM5085-Q1 30057714.png
Figure 17. ADJ Pin Current vs. Temperature
LM5085 LM5085-Q1 30057715.png
Figure 19. Feedback Reference Voltage vs. Temperature
LM5085 LM5085-Q1 30057760.png
Figure 21. RT Pin Shutdown Threshold vs. Temperature
LM5085 LM5085-Q1 30057706.png
Figure 2. Input Operating Current vs. VIN
LM5085 LM5085-Q1 30057708.png
Figure 4. VCC vs. VIN
LM5085 LM5085-Q1 30057711.png
Figure 6. On-Time vs. RT and VIN
LM5085 LM5085-Q1 30057713.gif
Figure 8. Voltage at the RT Pin
LM5085 LM5085-Q1 30057718.png
Figure 10. Input Operating Current vs. Temperature
LM5085 LM5085-Q1 30057754.png
Figure 12. VCC vs. Temperature
LM5085 LM5085-Q1 30057756.png
Figure 14. Minimum On-Time vs. Temperature
LM5085 LM5085-Q1 30057758.png
Figure 16. Current Limit Comparator Offset vs. Temperature
LM5085 LM5085-Q1 30057759.png
Figure 18. PGATE Driver Output Resistance vs. Temperature
LM5085 LM5085-Q1 30057716.png
Figure 20. Soft-Start Time vs. Temperature