JAJSC48B May   2004  – December 2014 LM5102

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Startup and UVLO
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Dissipation Considerations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 商標
    2. 11.2 静電気放電に関する注意事項
    3. 11.3 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings(1)(2)

MIN MAX UNIT
VDD to VSS –0.3 18 V
VHB to VHS –0.3 18 V
LI or HI Inputs to VSS –0.3 VDD + 0.3 V
LO Output –0.3 VDD + 0.3 V
HO Output VHS – 0.3 VHB + 0.3 V
VHS to VSS –1 100 V
VHB to VSS 118 V
RT1 and RT2 to VSS –0.3 5 V
Junction Temperature 150 °C
Storage Temperature Range –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN MAX UNIT
VDD 9 14 V
HS –1 100 V
HB VHS + 8 VHS + 14 V
HS Slew Rate < 50 V/ns
Junction Temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LM5102 UNIT
DGS DPR(2)
10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 165.3 37.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 58.9 38.1
RθJB Junction-to-board thermal resistance 54.4 14.9
ψJT Junction-to-top characterization parameter 6.2 0.4
ψJB Junction-to-board characterization parameter 83.6 15.2
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 4.4
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).
(2) 4 layer board with Cu finished thickness 1.5 oz, 1 oz, 1 oz, 1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50 x 50 mm ground and power planes embedded in PCB. See Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401).

6.5 Electrical Characteristics

Specifications in standard typeface are for TJ = +25°C. Unless otherwise specified, VDD = VHB = 12 V, VSS = VHS = 0V, RT1 = RT2 = 100 kΩ. No load on LO or HO.
PARAMETER TEST CONDITIONS MIN(1) TYP MAX(1) UNIT
SUPPLY CURRENTS
IDD VDD Quiescent Current LI = HI = 0 V 0.4 mA
LI = HI = 0 V, –40°C to +125°C 0.6
IDDO VDD Operating Current f = 500 kHz 1.5 mA
f = 500 kHz, –40°C to +125°C 3
IHB Total HB Quiescent Current LI = HI = 0 V 0.06 mA
LI = HI = 0 V, –40°C to +125°C 0.2
IHBO Total HB Operating Current f = 500 kHz 1.3 mA
f = 500 kHz, –40°C to +125°C 3
IHBS HB to VSS Current, Quiescent VHS = VHB = 100 V 0.05 µA
VHS = VHB = 100 V, –40°C to +125°C 10
IHBSO HB to VSS Current, Operating f = 500 kHz 0.08 mA
INPUT PINS
VIL Low Level Input Voltage Threshold 1.8 V
–40°C to +125°C 0.8
VIH High Level Input Voltage Threshold 1.8 V
–40°C to +125°C 2.2
RI Input Pulldown Resistance 200 kΩ
–40°C to +125°C 100 500
TIME DELAY CONTROLS
VRT Nominal Voltage at RT1, RT2 3 V
–40°C to +125°C 2.7 3.3
IRT RT Pin Current Limit RT1 = RT2 = 0 V 1.5 mA
RT1 = RT2 = 0 V, –40°C to +125°C 0.75 2.25
Vth Timer Termination Threshold 1.8 V
TDL1, TDH1 Rising edge turn-on delay, RT = 10 kΩ 105 ns
–40°C to +125°C 75 150
TDL2, TDH2 Rising edge turn-on delay, RT = 100 kΩ 630 ns
–40°C to +125°C 530 750
UNDER VOLTAGE PROTECTION
VDDR VDD Rising Threshold 6.9 V
–40°C to +125°C 6.0 7.4
VDDH VDD Threshold Hysteresis 0.5 V
VHBR HB Rising Threshold 6.6 V
–40°C to +125°C 5.7 7.1
VHBH HB Threshold Hysteresis 0.4 V
BOOTSTRAP DIODE
VDL Low-Current Forward Voltage IVDD-HB = 100 µA 0.60 V
IVDD-HB = 100 µA, –40°C to +125°C 0.9
VDH High-Current Forward Voltage IVDD-HB = 100 mA 0.85 V
IVDD-HB = 100 mA, –40°C to +125°C 1.1
RD Dynamic Resistance IVDD-HB = 100 mA 0.8 Ω
IVDD-HB = 100 mA, –40°C to +125°C 1.5
LO GATE DRIVER
VOLL Low-Level Output Voltage ILO = 100 mA 0.25 V
ILO = 100 mA, –40°C to +125°C 0.4
VOHL High-Level Output Voltage ILO = –100 mA, VOHL = VDD – VLO 0.35 V
ILO = –100 mA, VOHL = VDD – VLO, –40°C to +125°C 0.55
IOHL Peak Pullup Current VLO = 0 V 1.6 A
IOLL Peak Pulldown Current VLO = 12 V 1.8 A
HO GATE DRIVER
VOLH Low-Level Output Voltage IHO = 100 mA 0.25 V
IHO = 100 mA, –40°C to +125°C 0.4
VOHH High-Level Output Voltage IHO = –100 mA, VOHH = VHB – VHO 0.35 V
IHO = –100 mA, VOHH = VHB – VHO, –40°C to +125°C 0.55
IOHH Peak Pullup Current VHO = 0 V 1.6 A
IOLH Peak Pulldown Current VHO = 12 V 1.8 A

6.6 Switching Characteristics

Specifications in standard typeface are for TJ = +25°C. Unless otherwise specified, VDD = VHB = 12 V, VSS = VHS = 0 V, No Load on LO or HO.
PARAMETER TEST CONDITIONS MIN(1) TYP MAX(1) UNIT
tLPHL Lower Turn-Off Propagation Delay LM5102
(LI Falling to LO Falling)		 27 ns
–40°C to +125°C 56
tHPHL Upper Turn-Off Propagation Delay LM5102
(HI Falling to HO Falling)		 27 ns
–40°C to +125°C 56
tRC, tFC Either Output Rise/Fall Time CL = 1000 pF 15 ns
tR, tF Either Output Rise/Fall Time (3 V to 9 V) CL = 0.1 µF 0.6 µs
tBS Bootstrap Diode Turn-Off Time IF = 20 mA, IR = 200 mA 50 ns
(1) MIN and MAX limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate TI’s Average Outgoing Quality Level (AOQL).

6.7 Typical Characteristics

LM5102 20088910.gif
Figure 1. IDD vs Frequency
LM5102 20088912.gif
Figure 3. Quiescent Current vs Supply Voltage
LM5102 20088916.gif
Figure 5. IHB vs Frequency
LM5102 20088915.gif
Figure 7. Diode Forward Voltage
LM5102 20088919.gif
Figure 9. Undervoltage Rising Threshold vs Temperature
LM5102 20088921.gif
Figure 11. LO and HO Gate Drive — Low Level Output Voltage vs Temperature
LM5102 20088914.gif
Figure 13. Turn On Delay vs RT Resistor Value
LM5102 20088927.gif
Figure 15. Turn On Delay vs Temperature (RT = 100 k)
LM5102 20088911.gif
Figure 2. Operating Current vs Temperature
LM5102 20088913.gif
Figure 4. Quiescent Current vs Temperature
LM5102 20088917.gif
Figure 6. HO and LO Peak Output Current vs Output Voltage
LM5102 20088918.gif
Figure 8. Undervoltage Threshold Hysteresis vs Temperature
LM5102 20088920.gif
Figure 10. LO and HO Gate Drive — High Level Output Voltage vs Temperature
LM5102 20088922.gif
Figure 12. Turn Off Propagation Delay vs Temperature
LM5102 20088926.gif
Figure 14. Turn On Delay vs Temperature (RT = 10 k)